u-boot/include/spd.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
6  * Serial Presence Detect (SPD) EEPROM format according to the
30 	unsigned char min_delay;   /* 15 for Back to Back Random Address */
33 	unsigned char cas_lat;     /* 18 CAS# Latencies Supported */
38 	unsigned char clk_cycle2;  /* 23 Min SDRAM Cycle time at CL=X-1 */
39 	unsigned char clk_access2; /* 24 SDRAM Access from Clock at CL=X-1 */
40 	unsigned char clk_cycle3;  /* 25 Min SDRAM Cycle time at CL=X-2 */
41 	unsigned char clk_access3; /* 26 Max Access from Clock at CL=X-2 */
43 	unsigned char trrd;        /* 28 Min Row Active to Row Active (tRRD) */
44 	unsigned char trcd;        /* 29 Min RAS to CAS Delay (tRCD) */
45 	unsigned char tras;        /* 30 Minimum RAS Pulse Width (tRAS) */
52 	unsigned char twtr;        /* 37 Int write to read delay tWTR */
53 	unsigned char trtp;        /* 38 Int read to precharge delay tRTP */
55 	unsigned char trctrfc_ext; /* 40 Extensions to trc and trfc */
56 	unsigned char trc;         /* 41 Min Active to Auto refresh time tRC */
57 	unsigned char trfc;        /* 42 Min Auto to Active period tRFC */
59 	unsigned char tdqsq;       /* 44 Max DQS to DQ skew */
62 	unsigned char res[15];     /* 47-xx IDD in SPD and Reserved space */
64 	unsigned char cksum;       /* 63 Checksum for bytes 0-62 */
65 	unsigned char mid[8];      /* 64 Mfr's JEDEC ID code per JEP-108E */
77 	unsigned char intel_cas;   /* 129 Intel spec: CAS# Latency support */