include/linux/mdio.h

1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4  * Copyright 2006-2009 Solarflare Communications Inc.
24 #define MDIO_MMD_AN		7	/* Auto-Negotiation */
52 /* Media-dependent registers. */
53 #define MDIO_PMA_10GBT_SWAPPOL	130	/* 10GBASE-T pair swap & polarity */
54 #define MDIO_PMA_10GBT_TXPWR	131	/* 10GBASE-T TX power control */
55 #define MDIO_PMA_10GBT_SNR	133	/* 10GBASE-T SNR margin, lane A.
56 					 * Lanes B-D are numbered 134-136. */
57 #define MDIO_PMA_10GBR_FECABLE	170	/* 10GBASE-R FEC ability */
58 #define MDIO_PCS_10GBX_STAT1	24	/* 10GBASE-X PCS status 1 */
59 #define MDIO_PCS_10GBRT_STAT1	32	/* 10GBASE-R/-T PCS status 1 */
60 #define MDIO_PCS_10GBRT_STAT2	33	/* 10GBASE-R/-T PCS status 2 */
61 #define MDIO_AN_10GBT_CTRL	32	/* 10GBASE-T auto-negotiation control */
62 #define MDIO_AN_10GBT_STAT	33	/* 10GBASE-T auto-negotiation status */
92 /* 10PASS-TS/2BASE-TL */
96 #define MDIO_STAT1_LPOWERABLE		0x0002	/* Low-power ability */
108 #define MDIO_PMA_SPEED_2B		0x0002	/* 2BASE-TL capable */
109 #define MDIO_PMA_SPEED_10P		0x0004	/* 10PASS-TS capable */
113 #define MDIO_PCS_SPEED_10P2B		0x0002	/* 10PASS-TS/2BASE-TL capable */
137 #define MDIO_PMA_CTRL2_10GBCX4		0x0000	/* 10GBASE-CX4 type */
138 #define MDIO_PMA_CTRL2_10GBEW		0x0001	/* 10GBASE-EW type */
139 #define MDIO_PMA_CTRL2_10GBLW		0x0002	/* 10GBASE-LW type */
140 #define MDIO_PMA_CTRL2_10GBSW		0x0003	/* 10GBASE-SW type */
141 #define MDIO_PMA_CTRL2_10GBLX4		0x0004	/* 10GBASE-LX4 type */
142 #define MDIO_PMA_CTRL2_10GBER		0x0005	/* 10GBASE-ER type */
143 #define MDIO_PMA_CTRL2_10GBLR		0x0006	/* 10GBASE-LR type */
144 #define MDIO_PMA_CTRL2_10GBSR		0x0007	/* 10GBASE-SR type */
145 #define MDIO_PMA_CTRL2_10GBLRM		0x0008	/* 10GBASE-LRM type */
146 #define MDIO_PMA_CTRL2_10GBT		0x0009	/* 10GBASE-T type */
147 #define MDIO_PMA_CTRL2_10GBKX4		0x000a	/* 10GBASE-KX4 type */
148 #define MDIO_PMA_CTRL2_10GBKR		0x000b	/* 10GBASE-KR type */
149 #define MDIO_PMA_CTRL2_1000BT		0x000c	/* 1000BASE-T type */
150 #define MDIO_PMA_CTRL2_1000BKX		0x000d	/* 1000BASE-KX type */
151 #define MDIO_PMA_CTRL2_100BTX		0x000e	/* 100BASE-TX type */
152 #define MDIO_PMA_CTRL2_10BT		0x000f	/* 10BASE-T type */
153 #define MDIO_PCS_CTRL2_TYPE		0x0003	/* PCS type selection */
154 #define MDIO_PCS_CTRL2_10GBR		0x0000	/* 10GBASE-R type */
155 #define MDIO_PCS_CTRL2_10GBX		0x0001	/* 10GBASE-X type */
156 #define MDIO_PCS_CTRL2_10GBW		0x0002	/* 10GBASE-W type */
157 #define MDIO_PCS_CTRL2_10GBT		0x0003	/* 10GBASE-T type */
165 #define MDIO_PMA_STAT2_10GBEW		0x0002	/* 10GBASE-EW ability */
166 #define MDIO_PMA_STAT2_10GBLW		0x0004	/* 10GBASE-LW ability */
167 #define MDIO_PMA_STAT2_10GBSW		0x0008	/* 10GBASE-SW ability */
168 #define MDIO_PMA_STAT2_10GBLX4		0x0010	/* 10GBASE-LX4 ability */
169 #define MDIO_PMA_STAT2_10GBER		0x0020	/* 10GBASE-ER ability */
170 #define MDIO_PMA_STAT2_10GBLR		0x0040	/* 10GBASE-LR ability */
171 #define MDIO_PMA_STAT2_10GBSR		0x0080	/* 10GBASE-SR ability */
176 #define MDIO_PCS_STAT2_10GBR		0x0001	/* 10GBASE-R capable */
177 #define MDIO_PCS_STAT2_10GBX		0x0002	/* 10GBASE-X capable */
178 #define MDIO_PCS_STAT2_10GBW		0x0004	/* 10GBASE-W capable */
190 #define MDIO_PMD_RXDET_GLOBAL		0x0001	/* Global PMD RX signal detect */
191 #define MDIO_PMD_RXDET_0		0x0002	/* PMD RX signal detect 0 */
192 #define MDIO_PMD_RXDET_1		0x0004	/* PMD RX signal detect 1 */
193 #define MDIO_PMD_RXDET_2		0x0008	/* PMD RX signal detect 2 */
194 #define MDIO_PMD_RXDET_3		0x0010	/* PMD RX signal detect 3 */
197 #define MDIO_PMA_EXTABLE_10GCX4		0x0001	/* 10GBASE-CX4 ability */
198 #define MDIO_PMA_EXTABLE_10GBLRM	0x0002	/* 10GBASE-LRM ability */
199 #define MDIO_PMA_EXTABLE_10GBT		0x0004	/* 10GBASE-T ability */
200 #define MDIO_PMA_EXTABLE_10GBKX4	0x0008	/* 10GBASE-KX4 ability */
201 #define MDIO_PMA_EXTABLE_10GBKR		0x0010	/* 10GBASE-KR ability */
202 #define MDIO_PMA_EXTABLE_1000BT		0x0020	/* 1000BASE-T ability */
203 #define MDIO_PMA_EXTABLE_1000BKX	0x0040	/* 1000BASE-KX ability */
204 #define MDIO_PMA_EXTABLE_100BTX		0x0080	/* 100BASE-TX ability */
205 #define MDIO_PMA_EXTABLE_10BT		0x0100	/* 10BASE-T ability */
214 /* PMA 10GBASE-T pair swap & polarity */
222 /* PMA 10GBASE-T TX power register. */
223 #define MDIO_PMA_10GBT_TXPWR_SHORT	0x0001	/* Short-reach mode */
225 /* PMA 10GBASE-T SNR registers. */
226 /* Value is SNR margin in dB, clamped to range [-127, 127], plus 0x8000. */
230 /* PMA 10GBASE-R FEC ability register. */
234 /* PCS 10GBASE-R/-T status register 1. */
237 /* PCS 10GBASE-R/-T status register 2. */
241 /* AN 10GBASE-T control register. */
242 #define MDIO_AN_10GBT_CTRL_ADV10G	0x1000	/* Advertise 10GBASE-T */
244 /* AN 10GBASE-T status register. */
261 /* Note: the two defines above can be potentially used by the user-land
274 #define MDIO_PMA_LASI_RX_PHYXSLFLT	0x0001	/* PHY XS RX local fault */
275 #define MDIO_PMA_LASI_RX_PCSLFLT	0x0008	/* PCS RX local fault */
276 #define MDIO_PMA_LASI_RX_PMALFLT	0x0010	/* PMA/PMD RX local fault */
277 #define MDIO_PMA_LASI_RX_OPTICPOWERFLT	0x0020	/* RX optical power fault */
282 #define MDIO_PMA_LASI_TX_PCSLFLT	0x0008	/* PCS TX local fault */
301 #define MDIO_PRTAD_NONE			(-1)
302 #define MDIO_DEVAD_NONE			(-1)