Lines Matching +full:0 +full:xa4
37 u32 ospr; /* 0x200 */
38 u32 ospr1; /* 0x204 */
40 u32 fswpr; /* 0x218 FSL Section Write Protect */
41 u32 fsl_uid; /* 0x21c FSL UID 0 */
42 u32 fsl_uid_1; /* 0x220 FSL UID 0 */
44 u32 srk_hash[8]; /* 0x254 Super Root Key Hash */
45 u32 oem_uid; /* 0x274 OEM UID 0*/
46 u32 oem_uid_1; /* 0x278 OEM UID 1*/
47 u32 oem_uid_2; /* 0x27c OEM UID 2*/
48 u32 oem_uid_3; /* 0x280 OEM UID 3*/
49 u32 oem_uid_4; /* 0x284 OEM UID 4*/
54 u32 ospr; /* 0x200 */
56 u32 srk_hash[NUM_SRKH_REGS]; /* 0x23c Super Root Key Hash */
57 u32 oem_uid; /* 0x9c OEM Unique ID */
58 u8 reserved2[0x04];
59 u32 ovpr; /* 0xA4 Intent To Secure */
60 u8 reserved4[0x08];
61 u32 fsl_uid; /* 0xB0 FSL Unique ID */
62 u8 reserved5[0x04];
63 u32 fsl_spfr0; /* Scratch Pad Fuse Register 0 */
69 u8 reserved0[0x40];
70 u32 ospr; /* 0x40 OEM Security Policy Register */
71 u8 reserved2[0x38];
72 u32 srk_hash[8]; /* 0x7c Super Root Key Hash */
73 u32 oem_uid; /* 0x9c OEM Unique ID */
74 u8 reserved4[0x4];
75 u32 ovpr; /* 0xA4 OEM Validation Policy Register */
76 u8 reserved8[0x8];
77 u32 fsl_uid; /* 0xB0 FSL Unique ID */
81 #define ITS_MASK 0x00000004
86 #define OSPR_KEY_REVOC_MASK 0x0000fe00
89 #define OSPR_KEY_REVOC_MASK 0x0000e000