Lines Matching +full:0 +full:xf00

31 	u8 reserved0[0x04];
32 	u32 hp_com;	/* 0x04 SEC_MON_HP Command Register */
33 	u8 reserved2[0x0c];
34 	u32 hp_stat;	/* 0x08 SEC_MON_HP Status Register */
37 #define HPCOMR_SW_SV		0x100	/* Security Violation bit */
38 #define HPCOMR_SW_FSV		0x200	/* Fatal Security Violation bit */
39 #define HPCOMR_SSM_ST		0x1	/* SSM_ST field in SEC_MON command */
40 #define HPCOMR_SSM_ST_DIS	0x2	/* Disable Secure to Trusted State */
41 #define HPCOMR_SSM_SFNS_DIS	0x4	/* Disable Soft Fail to Non-Secure */
42 #define HPSR_SSM_ST_CHECK	0x900	/* SEC_MON is in check state */
43 #define HPSR_SSM_ST_NON_SECURE	0xb00	/* SEC_MON is in non secure state */
44 #define HPSR_SSM_ST_TRUST	0xd00	/* SEC_MON is in trusted state */
45 #define HPSR_SSM_ST_SOFT_FAIL	0x300	/* SEC_MON is in soft fail state */
46 #define HPSR_SSM_ST_SECURE	0xf00	/* SEC_MON is in secure state */
47 #define HPSR_SSM_ST_MASK	0xf00	/* Mask for SSM_ST field */