Lines Matching +full:auto +full:- +full:baud
1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
21 #define QE_DATAONLY_SIZE (QE_MURAM_SIZE - QE_DATAONLY_BASE)
74 /* QE CECR Sub Block Code - sub block code of QE command.
108 /* QE CECR Protocol - For non-MCC, specifies mode for QE CECR command.
134 QE_BRG1, /* Baud Rate Generator 1 */
135 QE_BRG2, /* Baud Rate Generator 2 */
136 QE_BRG3, /* Baud Rate Generator 3 */
137 QE_BRG4, /* Baud Rate Generator 4 */
138 QE_BRG5, /* Baud Rate Generator 5 */
139 QE_BRG6, /* Baud Rate Generator 6 */
140 QE_BRG7, /* Baud Rate Generator 7 */
141 QE_BRG8, /* Baud Rate Generator 8 */
142 QE_BRG9, /* Baud Rate Generator 9 */
143 QE_BRG10, /* Baud Rate Generator 10 */
144 QE_BRG11, /* Baud Rate Generator 11 */
145 QE_BRG12, /* Baud Rate Generator 12 */
146 QE_BRG13, /* Baud Rate Generator 13 */
147 QE_BRG14, /* Baud Rate Generator 14 */
148 QE_BRG15, /* Baud Rate Generator 15 */
149 QE_BRG16, /* Baud Rate Generator 16 */
219 #define QE_CP_CERCR_MEE 0x8000 /* Multi-user RAM ECC enable */
223 /* I-RAM */
224 #define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
238 u8 id[62]; /* Null-terminated identifier string */
239 u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */
251 u8 id[32]; /* Null-terminated identifier */
254 u32 iram_offset;/* Offset into I-RAM for the code */
255 u32 count; /* Number of 32-bit words of the code */