u-boot/include/fsl_memac.h

18 	u32	maxfrm;		/* Maximum frame length register */
45 	u32	rx_pause_frame_l; /* Rx valid pause frame upper */
46 	u32	rx_pause_frame_u; /* Rx valid pause frame upper */
47 	u32	rx_frame_l;	/* Rx frame counter lower */
48 	u32	rx_frame_u;	/* Rx frame counter upper */
49 	u32	rx_frame_crc_err_l; /* Rx frame check sequence error lower */
50 	u32	rx_frame_crc_err_u; /* Rx frame check sequence error upper */
51 	u32	rx_vlan_l;	/* Rx VLAN frame lower */
52 	u32	rx_vlan_u;	/* Rx VLAN frame upper */
53 	u32	rx_err_l;	/* Rx frame error lower */
54 	u32	rx_err_u;	/* Rx frame error upper */
55 	u32	rx_uni_l;	/* Rx unicast frame lower */
56 	u32	rx_uni_u;	/* Rx unicast frame upper */
57 	u32	rx_multi_l;	/* Rx multicast frame lower */
58 	u32	rx_multi_u;	/* Rx multicast frame upper */
59 	u32	rx_brd_l;	/* Rx broadcast frame lower */
60 	u32	rx_brd_u;	/* Rx broadcast frame upper */
98 	u32	tx_pause_frame_l; /* Tx valid pause frame lower */
99 	u32	tx_pause_frame_u; /* Tx valid pause frame upper */
100 	u32	tx_frame_l;	/* Tx frame counter lower */
101 	u32	tx_frame_u;	/* Tx frame counter upper */
102 	u32	tx_frame_crc_err_l; /* Tx frame check sequence error lower */
103 	u32	tx_frame_crc_err_u; /* Tx frame check sequence error upper */
104 	u32	tx_vlan_l;	/* Tx VLAN frame lower */
105 	u32	tx_vlan_u;	/* Tx VLAN frame upper */
106 	u32	tx_frame_err_l;	/* Tx frame error lower */
107 	u32	tx_frame_err_u;	/* Tx frame error upper */
108 	u32	tx_uni_l;	/* Tx unicast frame lower */
109 	u32	tx_uni_u;	/* Tx unicast frame upper */
110 	u32	tx_multi_l;	/* Tx multicast frame lower */
111 	u32	tx_multi_u;	/* Tx multicast frame upper */
112 	u32	tx_brd_l;	/* Tx broadcast frame lower */
113 	u32	tx_brd_u;	/* Tx broadcast frame upper */
175 #define IMASK_TX_ECC_ER		0x00001000 /* Tx frame ECC error mask */
177 #define IMASK_TX_ER		0x00000200 /* Tx frame error mask */
179 #define IMASK_RX_ECC_ER		0x00000080 /* Rx frame ECC error mask */
180 #define IMASK_RX_JAB_FRM	0x00000040 /* Rx jabber frame mask */
181 #define IMASK_RX_OVRSZ_FRM	0x00000020 /* Rx oversized frame mask */
182 #define IMASK_RX_RUNT_FRM	0x00000010 /* Rx runt frame mask */
183 #define IMASK_RX_FRAG_FRM	0x00000008 /* Rx fragment frame mask */
195 #define IEVENT_TX_ECC_ER	0x00001000 /* Tx frame ECC error */
197 #define IEVENT_TX_ER		0x00000200 /* Tx frame error */
199 #define IEVENT_RX_ECC_ER	0x00000080 /* Rx frame ECC error */
200 #define IEVENT_RX_JAB_FRM	0x00000040 /* Rx jabber frame */
201 #define IEVENT_RX_OVRSZ_FRM	0x00000020 /* Rx oversized frame */
202 #define IEVENT_RX_RUNT_FRM	0x00000010 /* Rx runt frame */
203 #define IEVENT_RX_FRAG_FRM	0x00000008 /* Rx fragment frame */