Lines Matching +full:0 +full:x0040000
35 #define CONFIG_SYS_IO_BASE 0xf0000000
37 #define CONFIG_SYS_MEMORY_BASE 0x60000000
38 #define CONFIG_SYS_IO_BASE 0x90000000
39 #define CONFIG_MAX_MEM_MAPPED 0x10000000
44 * LX60 0x04000000 64 MB
45 * LX110 0x03000000 48 MB
46 * LX200 0x06000000 96 MB
47 * ML605 0x18000000 384 MB
48 * KC705 0x38000000 896 MB
53 #if XCHAL_HAVE_PTP_MMU || CONFIG_BOARD_SDRAM_SIZE < 0x10000000
56 #define CONFIG_SYS_SDRAM_SIZE 0x10000000
59 #define CONFIG_SYS_SDRAM_BASE MEMADDR(0x00000000)
63 # define CONFIG_SYS_MONITOR_LEN 0x00020000 /* 128KB */
65 # define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */
74 #define CONFIG_SYS_MEMTEST_START MEMADDR(0x01000000)
75 #define CONFIG_SYS_MEMTEST_END MEMADDR(0x02000000)
85 #define CONFIG_STANDALONE_LOAD_ADDR 0x00800000
87 #define CONFIG_STANDALONE_LOAD_ADDR 0xd0800000
90 #define CONFIG_STANDALONE_LOAD_ADDR 0x60800000
104 #define CONFIG_SYS_LOAD_ADDR MEMADDR(0x02000000)
138 #define CONFIG_SYS_FPGAREG_DATE IOADDR(0x0D020000)
141 #define FPGAREG_MTH_MASK 0xFF000000
144 #define FPGAREG_DAY_MASK 0x00FF0000
145 #define FPGAREG_YEAR_SHIFT 0 /* BCD year 2001..9999*/
147 #define FPGAREG_YEAR_MASK 0x0000FFFF
150 #define CONFIG_SYS_FPGAREG_FREQ IOADDR(0x0D020004) /* CPU clock frequency*/
153 * DIP switch (left=sw1=lsb=bit0, right=sw8=msb=bit7; off=0, on=1):
154 * Bits 0..5 set the lower 6 bits of the default ethernet MAC.
157 * the base of flash * (when on/1) or to the base of RAM (when off/0).
159 #define CONFIG_SYS_FPGAREG_DIPSW IOADDR(0x0D02000C)
160 #define FPGAREG_MAC_SHIFT 0 /* Ethernet MAC bits 0..5 */
162 #define FPGAREG_MAC_MASK 0x3f
165 #define FPGAREG_BOOT_MASK 0x80
166 #define FPGAREG_BOOT_RAM 0
170 #define CONFIG_SYS_FPGAREG_RESET IOADDR(0x0D020010) /* Reset board .. */
171 #define CONFIG_SYS_FPGAREG_RESET_CODE 0x0000DEAD /* by writing this code */
179 #define CONFIG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */
190 #define CONFIG_SYS_ETHOC_BASE IOADDR(0x0d030000)
191 #define CONFIG_SYS_ETHOC_BUFFER_ADDR IOADDR(0x0D800000)
200 # define CONFIG_SYS_FLASH_SIZE 0x0040000 /* 4MB */
201 # define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */
202 # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */
203 # define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000)
206 # define CONFIG_SYS_FLASH_SIZE 0x8000000 /* 128MB */
207 # define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
208 # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */
209 # define CONFIG_SYS_FLASH_BASE IOADDR(0x00000000)
210 # define CONFIG_SYS_MONITOR_BASE IOADDR(0x06000000)
212 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* 16MB */
213 # define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
214 # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */
215 # define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000)