Lines Matching +full:0 +full:x02200000
20 #define PHYS_SDRAM_1 0x0
25 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
26 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000
28 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000
29 #define CONFIG_SYS_INIT_RAM_SIZE 0x40000 /* 256KB */
75 * that the address here is incremented by 0x400 from the Base address
76 * selected in QSys, since the SPI registers are at offset +0x400.
77 * #define CONFIG_SYS_SPI_BASE 0xff240400
96 * L4 OSC1 Timer 0
102 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
150 #define CONFIG_SYS_I2C_SLAVE 0x02
151 #define CONFIG_SYS_I2C_SLAVE1 0x02
152 #define CONFIG_SYS_I2C_SLAVE2 0x02
153 #define CONFIG_SYS_I2C_SLAVE3 0x02
195 #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
196 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
208 #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
214 #define CONFIG_ENV_OFFSET 0x00100000
221 * device nor0 <ff705000.spi.0>, # parts = 6
223 * 0: u-boot 0x00100000 0x00000000 0
224 * 1: env1 0x00040000 0x00100000 0
225 * 2: env2 0x00040000 0x00140000 0
226 * 3: UBI 0x03e80000 0x00180000 0
227 * 4: boot 0x00e80000 0x00180000 0
228 * 5: rootfs 0x01000000 0x01000000 0
237 * 0xFFFF_0000 ...... Start of SRAM
238 * 0xFFFF_xxxx ...... Top of stack (grows down)
239 * 0xFFFF_yyyy ...... Malloc area
240 * 0xFFFF_zzzz ...... Global Data
241 * 0xFFFF_FF00 ...... End of SRAM
244 * 0xFFE0_0000 ...... Start of SRAM (bottom)
245 * 0xFFEx_xxxx ...... Top of stack (grows down to bottom)
246 * 0xFFEy_yyyy ...... Global Data
247 * 0xFFEz_zzzz ...... Malloc area (grows up to top)
248 * 0xFFE3_FFFF ...... End of SRAM (top)
258 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
280 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
282 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
289 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
291 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000
320 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
334 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
335 "bootm_size=0xa000000\0" \
336 "kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
337 "fdt_addr_r=0x02000000\0" \
338 "scriptaddr=0x02100000\0" \
339 "pxefile_addr_r=0x02200000\0" \
340 "ramdisk_addr_r=0x02300000\0" \