Lines Matching +full:0 +full:xfd000000

14 	"bootdevice=0:1\0"						\
15 	"usbload=usb reset;usbboot;usb stop;bootm\0"
22 /* 0x40000000 - 0x47FFFFFF does not use */
23 #define CONFIG_SH_SDRAM_OFFSET		(0x8000000)
24 #define SH7785LCR_SDRAM_PHYS_BASE	(0x40000000 + CONFIG_SH_SDRAM_OFFSET)
25 #define SH7785LCR_SDRAM_BASE		(0x80000000 + CONFIG_SH_SDRAM_OFFSET)
27 #define SH7785LCR_FLASH_BASE_1		(0xa0000000)
29 #define SH7785LCR_USB_BASE		(0xa6000000)
31 #define SH7785LCR_SDRAM_BASE		(0x08000000)
33 #define SH7785LCR_FLASH_BASE_1		(0xa0000000)
35 #define SH7785LCR_USB_BASE		(0xb4000000)
69 				 (0 * SH7785LCR_FLASH_BANK_SIZE) }
81 #define CONFIG_R8A66597_XTAL		0x0000	/* 12MHz */
82 #define CONFIG_R8A66597_LDRV		0x8000	/* 3.3V */
83 #define CONFIG_R8A66597_ENDIAN		0x0000	/* little */
89 #define CONFIG_SH7780_PCI_LSR	0x1ff00001
90 #define CONFIG_SH7780_PCI_LAR	0x5f000000
91 #define CONFIG_SH7780_PCI_BAR	0x5f000000
93 #define CONFIG_SH7780_PCI_LSR	0x07f00001
99 #define CONFIG_PCI_MEM_BUS	0xFD000000	/* Memory space base addr */
101 #define CONFIG_PCI_MEM_SIZE	0x01000000	/* Size of Memory window */
103 #define CONFIG_PCI_IO_BUS	0xFE200000	/* IO space base address */
105 #define CONFIG_PCI_IO_SIZE	0x00200000	/* Size of IO window */