Lines Matching +full:0 +full:x63

12 #define QIXIS_XMAP_MASK			0x07
14 #define QIXIS_RST_CTL_RESET_EN		0x30
15 #define QIXIS_LBMAP_DFLTBANK		0x00
16 #define QIXIS_LBMAP_ALTBANK		0x20
17 #define QIXIS_LBMAP_QSPI		0x00
18 #define QIXIS_RCW_SRC_QSPI		0xff
19 #define QIXIS_RST_CTL_RESET		0x31
20 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
21 #define QIXIS_RCFG_CTL_RECONFIG_START	0x21
22 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
23 #define QIXIS_LBMAP_MASK		0x0f
25 #define QIXIS_RCW_SRC_SD           0x08
30 #define I2C_MUX_CH_VOL_MONITOR		0xA
32 #define I2C_VOL_MONITOR_ADDR		0x63
33 #define I2C_VOL_MONITOR_BUS_V_OFFSET	0x2
34 #define I2C_VOL_MONITOR_BUS_V_OVF	0x1
44 #define PMBUS_CMD_PAGE                  0x0
45 #define PMBUS_CMD_READ_VOUT             0x8B
46 #define PMBUS_CMD_PAGE_PLUS_WRITE       0x05
47 #define PMBUS_CMD_VOUT_COMMAND          0x21
48 #define PWM_CHANNEL0                    0x0
61 #define AQR107_PHY_ADDR1	0x04
62 #define AQR107_PHY_ADDR2	0x05
65 #define CORTINA_PHY_ADDR1	0x0
66 #define INPHI_PHY_ADDR1		0x0
68 #define RGMII_PHY_ADDR1		0x01
69 #define RGMII_PHY_ADDR2		0x02
74 #define I2C_MUX_CH_EMC2305		0x09
75 #define I2C_EMC2305_ADDR		0x4D
76 #define I2C_EMC2305_CMD		0x40
77 #define I2C_EMC2305_PWM		0x80
82 #define CONFIG_SYS_EEPROM_BUS_NUM	           0
83 #define CONFIG_SYS_I2C_EEPROM_ADDR	           0x57
91 	"lx2160ardb_vdd_mv=800\0"		\
92 	"BOARD=lx2160ardb\0"			\
94 		"sf probe 0:0 && sf read $load_addr "		\
98 		" bootm $load_addr#$BOARD\0"			\
105 		"bootm $load_addr#$BOARD\0"