include/configs/T4240RDB.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
39 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
56 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
68 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
144 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
151 /* Serial Port - controlled on board with jumper J8
152  * open - index 2
153  * shorted - index 1
177  * Memory space is mapped 1-1, but I/O space must start from 0.
273 #define CONFIG_UBOOTPATH	"u-boot.bin"	/* U-Boot image on TFTP server*/
279 	"setenv bootargs config-addr=0x60000000; "	\
280 	"bootm 0x01000000 - 0x00f00000"
296 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
377 				| CSOR_NAND_ECC_MODE_4  /* 4-bit ECC */ \
504  * eSPI - Enhanced SPI
629  * T4240 has 3 DDR controllers. Default to 3-way interleaving. It can be
630  * 3way_1KB, 3way_4KB, 3way_8KB. T4160 has 2 DDR controllers. Default to 2-way
632  * See doc/README.fsl-ddr for details.
662 	"setenv bootargs config-addr=0x60000000; "	\
663 	"bootm 0x01000000 - 0x00f00000"
678 	"bootm $loadaddr - $fdtaddr"
687 	"bootm $loadaddr - $fdtaddr"