Lines Matching +full:0 +full:x4500
17 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
46 #define CONFIG_SYS_MEMTEST_START 0x01000000 /* memtest works on */
47 #define CONFIG_SYS_MEMTEST_END 0x02000000
50 #define CONFIG_SYS_LBC_LBCR 0x00000000
55 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
63 #define CONFIG_SYS_SPD_BUS_NUM 0
64 #define SPD_EEPROM_ADDRESS 0x50
70 * 0x0000_0000 0x1fff_ffff DDR 512M cacheable
71 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable
72 * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable
73 * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable
74 * 0xff00_0000 0xff3f_ffff DPAA_QBMAN 4M cacheable
75 * 0xff60_0000 0xff7f_ffff CCSR 2M non-cacheable
76 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K cacheable TLB0
80 * 0xec00_0000 0xefff_ffff NOR flash 64M non-cacheable
81 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
87 #define CONFIG_SYS_FLASH_BASE 0xec000000 /* start of FLASH 64M */
92 #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7
101 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
102 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000/* Size of used area in RAM */
110 #define CONFIG_SYS_NAND_BASE 0xffa00000
142 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
147 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
148 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
154 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
155 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
157 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
158 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
167 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
169 #define CONFIG_SYS_EEPROM_BUS_NUM 0
173 * Memory space is mapped 1-1, but I/O space must start from 0.
178 #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000
179 #define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000
180 #define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000
181 #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
182 #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000
183 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
184 #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000
185 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
189 #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
190 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000
191 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000
192 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
193 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000
194 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
195 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000
196 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
200 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000
201 #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000
202 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000
203 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
204 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000
205 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
206 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000
207 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
219 #define CONFIG_ENV_SIZE 0x2000
220 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
239 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
259 #define CONFIG_SYS_QMAN_MEM_BASE 0xff000000
261 #define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000
262 #define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
263 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
269 #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
270 #define CONFIG_SYS_BMAN_MEM_BASE 0xff200000
272 #define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000
273 #define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000
274 #define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000
280 #define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08
293 #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
294 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
295 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
298 #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1
299 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x2
306 "netdev=eth0\0" \
307 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
308 "loadaddr=1000000\0" \
309 "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
315 "cmp.b $loadaddr $ubootaddr $filesize\0" \
316 "consoledev=ttyS0\0" \
317 "ramdiskaddr=2000000\0" \
318 "ramdiskfile=rootfs.ext2.gz.uboot\0" \
319 "fdtaddr=1e00000\0" \
320 "fdtfile=p1023rdb.dtb\0" \
321 "othbootargs=ramdisk_size=600000\0" \
322 "bdev=sda1\0" \
323 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0"