555 #define UTCR1_BdRtDiv(Div)		/*  Baud Rate Divisor [16..65536]  */ \  argument
558 #define UTCR2_BdRtDiv(Div)		/*  Baud Rate Divisor [16..65536]  */ \  argument
563 #define UTCR1_CeilBdRtDiv(Div)		/*  Ceil. of BdRtDiv [16..65536]   */ \  argument
566 #define UTCR2_CeilBdRtDiv(Div)		/*  Ceil. of BdRtDiv [16..65536]   */ \  argument
713 #define SDCR3_BdRtDiv(Div)		/*  Baud Rate Divisor [16..65536]  */ \  argument
716 #define SDCR4_BdRtDiv(Div)		/*  Baud Rate Divisor [16..65536]  */ \  argument
721 #define SDCR3_CeilBdRtDiv(Div)		/*  Ceil. of BdRtDiv [16..65536]   */ \  argument
724 #define SDCR4_CeilBdRtDiv(Div)		/*  Ceil. of BdRtDiv [16..65536]   */ \  argument
910 #define MCCR0_AudSmpDiv(Div)		/*  Audio Sampling rate Divisor    */ \  argument
915 #define MCCR0_CeilAudSmpDiv(Div)	/*  Ceil. of AudSmpDiv [192..4064] */ \  argument
923 #define MCCR0_TcmSmpDiv(Div)		/*  Telecom Sampling rate Divisor  */ \  argument
928 #define MCCR0_CeilTcmSmpDiv(Div)	/*  Ceil. of TcmSmpDiv [512..4064] */ \  argument
950 #define MCCR0_ExtClkDiv(Div)		/*  External Clock Divisor [1..4]  */ \  argument
1054 #define SSCR0_SerClkDiv(Div)		/*  Serial Clock Divisor [2..512]  */ \  argument
1058 #define SSCR0_CeilSerClkDiv(Div)	/*  Ceil. of SerClkDiv [2..512]    */ \  argument
2785 #define LCCR3_PixClkDiv(Div)		/*  Pixel Clock Divisor [6..514]   */ \  argument
2789 #define LCCR3_CeilPixClkDiv(Div)	/*  Ceil. of PixClkDiv [6..514]    */ \  argument
2795 #define LCCR3_ACBsDiv(Div)		/*  AC Bias clock Divisor [2..512] */ \  argument
2799 #define LCCR3_CeilACBsDiv(Div)		/*  Ceil. of ACBsDiv [2..512]	   */ \  argument