drivers/watchdog/xilinx_tb_wdt.c

1 // SPDX-License-Identifier: GPL-2.0+
8  * Copyright (c) 2011-2018 Xilinx Inc.
18 #define XWT_CSR0_EWDT1_MASK	0x00000002 /* Enable bit 1 Mask*/
19 #define XWT_CSRX_EWDT2_MASK	0x00000001 /* Enable bit 2 Mask */
37 	debug("%s ", __func__);  in xlnx_wdt_reset()
40 	reg = readl(&platdata->regs->twcsr0);  in xlnx_wdt_reset()
44 		writel(reg | XWT_CSR0_WDS_MASK, &platdata->regs->twcsr0);  in xlnx_wdt_reset()
54 	if (platdata->enable_once) {  in xlnx_wdt_stop()
55 		debug("Can't stop Xilinx watchdog.\n");  in xlnx_wdt_stop()
56 		return -EBUSY;  in xlnx_wdt_stop()
60 	reg = readl(&platdata->regs->twcsr0);  in xlnx_wdt_stop()
62 	writel(reg & ~XWT_CSR0_EWDT1_MASK, &platdata->regs->twcsr0);  in xlnx_wdt_stop()
63 	writel(~XWT_CSRX_EWDT2_MASK, &platdata->regs->twcsr1);  in xlnx_wdt_stop()
65 	debug("Watchdog disabled!\n");  in xlnx_wdt_stop()
74 	debug("%s:\n", __func__);  in xlnx_wdt_start()
77 	       &platdata->regs->twcsr0);  in xlnx_wdt_start()
79 	writel(XWT_CSRX_EWDT2_MASK, &platdata->regs->twcsr1);  in xlnx_wdt_start()
86 	debug("%s: Probing wdt%u\n", __func__, dev->seq);  in xlnx_wdt_probe()
95 	platdata->regs = (struct watchdog_regs *)dev_read_addr(dev);  in xlnx_wdt_ofdata_to_platdata()
96 	if (IS_ERR(platdata->regs))  in xlnx_wdt_ofdata_to_platdata()
97 		return PTR_ERR(platdata->regs);  in xlnx_wdt_ofdata_to_platdata()
99 	platdata->enable_once = dev_read_u32_default(dev,  in xlnx_wdt_ofdata_to_platdata()
100 						     "xlnx,wdt-enable-once", 0);  in xlnx_wdt_ofdata_to_platdata()
102 	debug("%s: wdt-enable-once %d\n", __func__, platdata->enable_once);  in xlnx_wdt_ofdata_to_platdata()
114 	{ .compatible = "xlnx,xps-timebase-wdt-1.00.a", },
115 	{ .compatible = "xlnx,xps-timebase-wdt-1.01.a", },