Lines Matching +full:probe +full:- +full:reset
1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence WDT driver - Used by Xilinx Zynq
18 u32 zmr; /* WD Zero mode register, offset - 0x0 */
19 u32 ccr; /* Counter Control Register offset - 0x4 */
20 u32 restart; /* Restart key register, offset - 0x8 */
21 u32 status; /* Status Register, offset - 0xC */
32 /* Supports 1 - 516 sec */
62 * Zero Mode Register - This register controls how the time out is indicated
66 #define CDNS_WDT_ZMR_RSTEN_MASK 0x00000002 /* Enable the reset output */
68 #define CDNS_WDT_ZMR_RSTLEN_16 0x00000030 /* Reset pulse of 16 pclk cycles */
72 * Counter Control register - This register controls how fast the timer runs
73 * and the reset value and also contains the access code to allow writes to
76 #define CDNS_WDT_CCR_CRV_MASK 0x00003FFC /* Counter reset value */
85 * cdns_wdt_reset - Reload the watchdog timer (i.e. pat the watchdog).
99 cdns_wdt_writereg(&priv->regs->restart, CDNS_WDT_RESTART_KEY); in cdns_wdt_reset()
105 * cdns_wdt_start - Enable and start the watchdog.
117 * Clears the contents of prescaler and counter reset value. Sets the
121 * Sets the WDT (WDEN bit) and either the Reset signal(RSTEN bit)
125 * Return: Upon success 0, failure -1.
136 return -1; in cdns_wdt_start()
142 return -1; in cdns_wdt_start()
147 timeout = priv->timeout; in cdns_wdt_start()
162 * counter reset to be written to control register. in cdns_wdt_start()
170 cdns_wdt_writereg(&priv->regs->zmr, CDNS_WDT_ZMR_ZKEY_VAL); in cdns_wdt_start()
176 cdns_wdt_writereg(&priv->regs->ccr, data); in cdns_wdt_start()
181 /* Reset on timeout if specified in device tree. */ in cdns_wdt_start()
182 if (priv->rst) { in cdns_wdt_start()
190 cdns_wdt_writereg(&priv->regs->zmr, data); in cdns_wdt_start()
191 cdns_wdt_writereg(&priv->regs->restart, CDNS_WDT_RESTART_KEY); in cdns_wdt_start()
197 * cdns_wdt_stop - Stop the watchdog.
210 cdns_wdt_writereg(&priv->regs->zmr, in cdns_wdt_stop()
217 * cdns_wdt_probe - Probe call for the device.
225 debug("%s: Probing wdt%u\n", __func__, dev->seq); in cdns_wdt_probe()
234 priv->regs = (struct cdns_regs *)dev_read_addr(dev); in cdns_wdt_ofdata_to_platdata()
235 if (IS_ERR(priv->regs)) in cdns_wdt_ofdata_to_platdata()
236 return PTR_ERR(priv->regs); in cdns_wdt_ofdata_to_platdata()
238 priv->timeout = dev_read_u32_default(dev, "timeout-sec", in cdns_wdt_ofdata_to_platdata()
241 priv->rst = dev_read_bool(dev, "reset-on-timeout"); in cdns_wdt_ofdata_to_platdata()
243 debug("%s: timeout %d, reset %d\n", __func__, priv->timeout, priv->rst); in cdns_wdt_ofdata_to_platdata()
250 .reset = cdns_wdt_reset,
256 { .compatible = "cdns,wdt-r1p2" },
264 .probe = cdns_wdt_probe,