Lines Matching refs:tegra_sor_write_field
59 static inline void tegra_sor_write_field(struct tegra_dc_sor_data *sor, in tegra_sor_write_field() function
72 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dp_disable_tx_pu()
81 tegra_sor_write_field(sor, PR(sor->portnum), mask, pe_reg); in tegra_dp_set_pe_vs_pc()
82 tegra_sor_write_field(sor, DC(sor->portnum), mask, vs_reg); in tegra_dp_set_pe_vs_pc()
84 tegra_sor_write_field(sor, POSTCURSOR(sor->portnum), mask, in tegra_dp_set_pe_vs_pc()
301 tegra_sor_write_field(sor, DP_AUDIO_HBLANK_SYMBOLS, in tegra_dc_sor_set_dp_mode()
305 tegra_sor_write_field(sor, DP_AUDIO_VBLANK_SYMBOLS, in tegra_dc_sor_set_dp_mode()
420 tegra_sor_write_field(sor, CLK_CNTRL, in tegra_dc_sor_set_link_bandwidth()
486 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
493 tegra_sor_write_field(sor, PLL0, PLL0_PWR_MASK | /* PDPLL */ in tegra_dc_sor_power_up()
496 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_power_up()
507 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
513 tegra_sor_write_field(sor, PLL0, in tegra_dc_sor_power_up()
518 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
524 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
667 tegra_sor_write_field(sor, CSTM, in tegra_dc_sor_config_panel()
696 tegra_sor_write_field(sor, CLK_CNTRL, in tegra_dc_sor_enable_dp()
700 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
705 tegra_sor_write_field(sor, PLL3, in tegra_dc_sor_enable_dp()
714 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
732 tegra_sor_write_field(sor, PLL2, PLL2_AUX2_MASK | in tegra_dc_sor_enable_dp()
846 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_set_lane_parm()
853 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), 0xf0, 0xf0); in tegra_dc_sor_set_lane_parm()
856 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), 0xf0, 0x0); in tegra_dc_sor_set_lane_parm()
949 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_sor_precharge_lanes()
953 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_sor_precharge_lanes()