25 static int tegra_dc_calc_refresh(const struct display_timing *timing)  in tegra_dc_calc_refresh()  argument
28 	int pclk = timing->pixelclock.typ;  in tegra_dc_calc_refresh()
30 	h_total = timing->hactive.typ + timing->hfront_porch.typ +  in tegra_dc_calc_refresh()
31 			timing->hback_porch.typ + timing->hsync_len.typ;  in tegra_dc_calc_refresh()
32 	v_total = timing->vactive.typ + timing->vfront_porch.typ +  in tegra_dc_calc_refresh()
33 			timing->vback_porch.typ + timing->vsync_len.typ;  in tegra_dc_calc_refresh()
43 static void print_mode(const struct display_timing *timing)  in print_mode()  argument
45 	int refresh = tegra_dc_calc_refresh(timing);  in print_mode()
48 	      timing->hactive.typ, timing->vactive.typ, refresh / 1000,  in print_mode()
49 	      refresh % 1000, timing->pixelclock.typ);  in print_mode()
53 			       const struct display_timing *timing,  in update_display_mode()  argument
56 	print_mode(timing);  in update_display_mode()
63 	writel(timing->vsync_len.typ << 16 | timing->hsync_len.typ,  in update_display_mode()
66 	writel(((timing->vback_porch.typ - vref_to_sync) << 16) |  in update_display_mode()
67 		timing->hback_porch.typ, &disp_ctrl->disp.back_porch);  in update_display_mode()
69 	writel(((timing->vfront_porch.typ + vref_to_sync) << 16) |  in update_display_mode()
70 		timing->hfront_porch.typ, &disp_ctrl->disp.front_porch);  in update_display_mode()
72 	writel(timing->hactive.typ | (timing->vactive.typ << 16),  in update_display_mode()
92 	      timing->pixelclock.typ, shift_clock_div);  in update_display_mode()
225 			 const struct display_timing *timing)  in update_window()  argument
233 	writel(((timing->vactive.typ << 16) | timing->hactive.typ),  in update_window()
235 	writel(((timing->vactive.typ << 16) |  in update_window()
236 		(timing->hactive.typ * fb_bits_per_pixel / 8)),  in update_window()
238 	writel(((timing->hactive.typ * fb_bits_per_pixel / 8 + 31) /  in update_window()
304 static void dump_config(int panel_bpp, struct display_timing *timing)  in dump_config()  argument
306 	printf("timing->hactive.typ = %d\n", timing->hactive.typ);  in dump_config()
307 	printf("timing->vactive.typ = %d\n", timing->vactive.typ);  in dump_config()
308 	printf("timing->pixelclock.typ = %d\n", timing->pixelclock.typ);  in dump_config()
310 	printf("timing->hfront_porch.typ = %d\n", timing->hfront_porch.typ);  in dump_config()
311 	printf("timing->hsync_len.typ = %d\n", timing->hsync_len.typ);  in dump_config()
312 	printf("timing->hback_porch.typ = %d\n", timing->hback_porch.typ);  in dump_config()
314 	printf("timing->vfront_porch.typ  %d\n", timing->vfront_porch.typ);  in dump_config()
315 	printf("timing->vsync_len.typ = %d\n", timing->vsync_len.typ);  in dump_config()
316 	printf("timing->vback_porch.typ = %d\n", timing->vback_porch.typ);  in dump_config()
323 					   struct display_timing *timing)  in display_update_config_from_edid()  argument
325 	return display_read_timing(dp_dev, timing);  in display_update_config_from_edid()
329 			int fb_bits_per_pixel, struct display_timing *timing)  in display_init()  argument
362 	if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) {  in display_init()
367 	ret = display_update_config_from_edid(dp_dev, &panel_bpp, timing);  in display_init()
370 		dump_config(panel_bpp, timing);  in display_init()
378 	plld_rate = clock_set_display_rate(timing->pixelclock.typ * 2);  in display_init()
382 	} else if (plld_rate != timing->pixelclock.typ * 2) {  in display_init()
384 		timing->pixelclock.typ = plld_rate / 2;  in display_init()
395 	ret = update_display_mode(dc_ctlr, timing, href_to_sync, vref_to_sync);  in display_init()
402 	ret = display_enable(dp_dev, panel_bpp, timing);  in display_init()
408 	ret = update_window(dc_ctlr, (ulong)lcdbase, fb_bits_per_pixel, timing);  in display_init()
429 	struct display_timing timing;  in tegra124_lcd_init()  local
448 	ret = display_init(dev, lcdbase, 1 << l2bpp, &timing);  in tegra124_lcd_init()
452 	uc_priv->xsize = roundup(timing.hactive.typ, 16);  in tegra124_lcd_init()
453 	uc_priv->ysize = timing.vactive.typ;  in tegra124_lcd_init()