Lines Matching +full:rk3288 +full:- +full:vop
1 // SPDX-License-Identifier: GPL-2.0+
27 int vop_id = uc_plat->source_id; in rk3288_hdmi_enable()
28 struct rk3288_grf *grf = priv->grf; in rk3288_hdmi_enable()
31 rk_setreg(&grf->soc_con6, 1 << 15); in rk3288_hdmi_enable()
33 /* hdmi data from vop id */ in rk3288_hdmi_enable()
34 rk_clrsetreg(&grf->soc_con6, 1 << 4, (vop_id == 1) ? (1 << 4) : 0); in rk3288_hdmi_enable()
42 struct dw_hdmi *hdmi = &priv->hdmi; in rk3288_hdmi_ofdata_to_platdata()
44 hdmi->i2c_clk_high = 0x7a; in rk3288_hdmi_ofdata_to_platdata()
45 hdmi->i2c_clk_low = 0x8d; in rk3288_hdmi_ofdata_to_platdata()
48 * TODO(sjg@chromium.org): The above values don't work - these in rk3288_hdmi_ofdata_to_platdata()
51 hdmi->i2c_clk_high = 0x0d; in rk3288_hdmi_ofdata_to_platdata()
52 hdmi->i2c_clk_low = 0x0d; in rk3288_hdmi_ofdata_to_platdata()
67 ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); in rk3288_clk_config()
74 __func__, uc_plat->src_dev->name, ret); in rk3288_clk_config()
87 /* Enable VOP clock for RK3288 */ in rk3288_hdmi_probe()
103 { .compatible = "rockchip,rk3288-dw-hdmi" },