827 int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,  in ipu_init_sync_panel()  argument
860 		if (!(g_di1_tvout && (disp == 1))) { /*not round div for tvout*/  in ipu_init_sync_panel()
867 				di_parent = clk_get_parent(g_di_clk[disp]);  in ipu_init_sync_panel()
869 					clk_round_rate(g_pixel_clk[disp],  in ipu_init_sync_panel()
880 				clk_set_rate(g_di_clk[disp],  in ipu_init_sync_panel()
885 		clk_set_parent(g_pixel_clk[disp], g_ldb_clk);  in ipu_init_sync_panel()
887 		if (clk_get_usecount(g_pixel_clk[disp]) != 0)  in ipu_init_sync_panel()
888 			clk_set_parent(g_pixel_clk[disp], g_ipu_clk);  in ipu_init_sync_panel()
890 	rounded_pixel_clk = clk_round_rate(g_pixel_clk[disp], pixel_clk);  in ipu_init_sync_panel()
891 	clk_set_rate(g_pixel_clk[disp], rounded_pixel_clk);  in ipu_init_sync_panel()
894 	div = clk_get_rate(clk_get_parent(g_pixel_clk[disp])) /  in ipu_init_sync_panel()
897 	ipu_di_data_wave_config(disp, SYNC_WAVE, div - 1, div - 1);  in ipu_init_sync_panel()
898 	ipu_di_data_pin_config(disp, SYNC_WAVE, DI_PIN15, 3, 0, div * 2);  in ipu_init_sync_panel()
906 	di_gen = __raw_readl(DI_GENERAL(disp));  in ipu_init_sync_panel()
911 				disp,		/* display */  in ipu_init_sync_panel()
928 				disp,		/* display */  in ipu_init_sync_panel()
945 				disp,		/* display */  in ipu_init_sync_panel()
962 				disp,		/* display */  in ipu_init_sync_panel()
979 				disp,		/* display */  in ipu_init_sync_panel()
996 				disp,		/* display */  in ipu_init_sync_panel()
1014 				disp,		/* display */  in ipu_init_sync_panel()
1031 				disp,		/* display */  in ipu_init_sync_panel()
1047 				disp,		/* display */  in ipu_init_sync_panel()
1063 		reg = __raw_readl(DI_SW_GEN1(disp, 9));  in ipu_init_sync_panel()
1066 		__raw_writel(reg, DI_SW_GEN1(disp, 9));  in ipu_init_sync_panel()
1068 		__raw_writel(v_total / 2 - 1, DI_SCR_CONF(disp));  in ipu_init_sync_panel()
1076 		ipu_di_sync_config(disp, 1, h_total - 1, DI_SYNC_CLK,  in ipu_init_sync_panel()
1082 		ipu_di_sync_config(disp, DI_SYNC_HSYNC, h_total - 1,  in ipu_init_sync_panel()
1088 		ipu_di_sync_config(disp, DI_SYNC_VSYNC, v_total - 1,  in ipu_init_sync_panel()
1092 		__raw_writel(v_total - 1, DI_SCR_CONF(disp));  in ipu_init_sync_panel()
1095 		ipu_di_sync_config(disp, 4, 0, DI_SYNC_HSYNC,  in ipu_init_sync_panel()
1100 		ipu_di_sync_config(disp, 5, 0, DI_SYNC_CLK,  in ipu_init_sync_panel()
1106 		__raw_writel(0, DI_SW_GEN0(disp, 6));  in ipu_init_sync_panel()
1107 		__raw_writel(0, DI_SW_GEN1(disp, 6));  in ipu_init_sync_panel()
1108 		__raw_writel(0, DI_SW_GEN0(disp, 7));  in ipu_init_sync_panel()
1109 		__raw_writel(0, DI_SW_GEN1(disp, 7));  in ipu_init_sync_panel()
1110 		__raw_writel(0, DI_SW_GEN0(disp, 8));  in ipu_init_sync_panel()
1111 		__raw_writel(0, DI_SW_GEN1(disp, 8));  in ipu_init_sync_panel()
1112 		__raw_writel(0, DI_SW_GEN0(disp, 9));  in ipu_init_sync_panel()
1113 		__raw_writel(0, DI_SW_GEN1(disp, 9));  in ipu_init_sync_panel()
1115 		reg = __raw_readl(DI_STP_REP(disp, 6));  in ipu_init_sync_panel()
1117 		__raw_writel(reg, DI_STP_REP(disp, 6));  in ipu_init_sync_panel()
1118 		__raw_writel(0, DI_STP_REP(disp, 7));  in ipu_init_sync_panel()
1119 		__raw_writel(0, DI_STP_REP9(disp));  in ipu_init_sync_panel()
1122 		if (disp) {  in ipu_init_sync_panel()
1142 	__raw_writel(di_gen, DI_GENERAL(disp));  in ipu_init_sync_panel()
1145 			0x00000002, DI_SYNC_AS_GEN(disp));  in ipu_init_sync_panel()
1147 	reg = __raw_readl(DI_POL(disp));  in ipu_init_sync_panel()
1153 	__raw_writel(reg, DI_POL(disp));  in ipu_init_sync_panel()
1155 	__raw_writel(width, DC_DISP_CONF2(DC_DISP_ID_SYNC(disp)));  in ipu_init_sync_panel()