Lines Matching +full:tx +full:- +full:swing +full:- +full:low

1 // SPDX-License-Identifier: GPL-2.0+
24 reg = readl(&dp_regs->video_ctl1); in exynos_dp_enable_video_input()
31 writel(reg, &dp_regs->video_ctl1); in exynos_dp_enable_video_input()
41 reg = readl(&dp_regs->video_ctl4); in exynos_dp_enable_video_bist()
48 writel(reg, &dp_regs->video_ctl4); in exynos_dp_enable_video_bist()
57 reg = readl(&dp_regs->video_ctl1); in exynos_dp_enable_video_mute()
62 writel(reg, &dp_regs->video_ctl1); in exynos_dp_enable_video_mute()
74 * Normal bandgap, Normal swing, Tx terminal registor 61 ohm in exynos_dp_init_analog_param()
75 * 24M Phy clock, TX digital logic power is 100:1.0625V in exynos_dp_init_analog_param()
79 writel(reg, &dp_regs->analog_ctl1); in exynos_dp_init_analog_param()
82 writel(reg, &dp_regs->analog_ctl2); in exynos_dp_init_analog_param()
86 * Select current reference of TX driver current to 00:Ipp/2+Ic/2. in exynos_dp_init_analog_param()
87 * Set VCO range of PLL +- 0uA in exynos_dp_init_analog_param()
90 writel(reg, &dp_regs->analog_ctl3); in exynos_dp_init_analog_param()
93 * Set AUX TX terminal resistor to 102 ohm in exynos_dp_init_analog_param()
97 writel(reg, &dp_regs->pll_filter_ctl1); in exynos_dp_init_analog_param()
106 writel(reg, &dp_regs->amp_tuning_ctl); in exynos_dp_init_analog_param()
114 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_param()
125 * 1 = assert high, 0 = assert low in exynos_dp_init_interrupt()
127 writel(INT_POL, &dp_regs->int_ctl); in exynos_dp_init_interrupt()
130 writel(0xff, &dp_regs->common_int_sta1); in exynos_dp_init_interrupt()
131 writel(0xff, &dp_regs->common_int_sta2); in exynos_dp_init_interrupt()
132 writel(0xff, &dp_regs->common_int_sta3); in exynos_dp_init_interrupt()
133 writel(0xff, &dp_regs->common_int_sta4); in exynos_dp_init_interrupt()
134 writel(0xff, &dp_regs->int_sta); in exynos_dp_init_interrupt()
137 writel(0x00, &dp_regs->int_sta_mask1); in exynos_dp_init_interrupt()
138 writel(0x00, &dp_regs->int_sta_mask2); in exynos_dp_init_interrupt()
139 writel(0x00, &dp_regs->int_sta_mask3); in exynos_dp_init_interrupt()
140 writel(0x00, &dp_regs->int_sta_mask4); in exynos_dp_init_interrupt()
141 writel(0x00, &dp_regs->int_sta_mask); in exynos_dp_init_interrupt()
148 /* dp tx sw reset */ in exynos_dp_reset()
149 writel(RESET_DP_TX, &dp_regs->tx_sw_reset); in exynos_dp_reset()
160 writel(reg_func_1, &dp_regs->func_en1); in exynos_dp_reset()
161 writel(reg_func_1, &dp_regs->func_en2); in exynos_dp_reset()
175 reg = readl(&dp_regs->func_en1); in exynos_dp_enable_sw_func()
181 writel(reg, &dp_regs->func_en1); in exynos_dp_enable_sw_func()
191 reg = readl(&dp_regs->phy_pd); in exynos_dp_set_analog_power_down()
232 return -1; in exynos_dp_set_analog_power_down()
235 writel(reg, &dp_regs->phy_pd); in exynos_dp_set_analog_power_down()
244 reg = readl(&dp_regs->debug_ctl); in exynos_dp_get_pll_lock_status()
257 reg = readl(&dp_regs->pll_ctl); in exynos_dp_set_pll_power()
263 writel(reg, &dp_regs->pll_ctl); in exynos_dp_set_pll_power()
276 writel(reg, &dp_regs->common_int_sta1); in exynos_dp_init_analog_func()
278 reg = readl(&dp_regs->debug_ctl); in exynos_dp_init_analog_func()
280 writel(reg, &dp_regs->debug_ctl); in exynos_dp_init_analog_func()
283 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
285 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
290 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
292 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
298 retry_cnt--; in exynos_dp_init_analog_func()
302 return -EINVAL; in exynos_dp_init_analog_func()
309 reg = readl(&dp_regs->func_en2); in exynos_dp_init_analog_func()
312 writel(reg, &dp_regs->func_en2); in exynos_dp_init_analog_func()
323 writel(reg, &dp_regs->common_int_sta4); in exynos_dp_init_hpd()
326 writel(reg, &dp_regs->int_sta); in exynos_dp_init_hpd()
328 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_init_hpd()
330 writel(reg, &dp_regs->sys_ctl3); in exynos_dp_init_hpd()
340 reg = readl(&dp_regs->func_en2); in exynos_dp_reset_aux()
342 writel(reg, &dp_regs->func_en2); in exynos_dp_reset_aux()
353 writel(reg, &dp_regs->int_sta); in exynos_dp_init_aux()
360 writel(reg, &dp_regs->aux_hw_retry_ctl); in exynos_dp_init_aux()
364 writel(reg, &dp_regs->aux_ch_defer_ctl); in exynos_dp_init_aux()
367 reg = readl(&dp_regs->func_en2); in exynos_dp_init_aux()
369 writel(reg, &dp_regs->func_en2); in exynos_dp_init_aux()
380 writel(reg, &dp_regs->common_int_mask1); in exynos_dp_config_interrupt()
383 writel(reg, &dp_regs->common_int_mask2); in exynos_dp_config_interrupt()
386 writel(reg, &dp_regs->common_int_mask3); in exynos_dp_config_interrupt()
389 writel(reg, &dp_regs->common_int_mask4); in exynos_dp_config_interrupt()
392 writel(reg, &dp_regs->int_sta_mask); in exynos_dp_config_interrupt()
401 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_get_plug_in_status()
405 return -1; in exynos_dp_get_plug_in_status()
416 return -EINVAL; in exynos_dp_detect_hpd()
418 timeout_loop--; in exynos_dp_detect_hpd()
431 reg = readl(&dp_regs->aux_ch_ctl2); in exynos_dp_start_aux_transaction()
433 writel(reg, &dp_regs->aux_ch_ctl2); in exynos_dp_start_aux_transaction()
437 reg = readl(&dp_regs->int_sta); in exynos_dp_start_aux_transaction()
441 ret = -EAGAIN; in exynos_dp_start_aux_transaction()
445 retry_cnt--; in exynos_dp_start_aux_transaction()
451 writel(reg, &dp_regs->int_sta); in exynos_dp_start_aux_transaction()
454 reg = readl(&dp_regs->int_sta); in exynos_dp_start_aux_transaction()
457 writel(AUX_ERR, &dp_regs->int_sta); in exynos_dp_start_aux_transaction()
458 ret = -EAGAIN; in exynos_dp_start_aux_transaction()
463 reg = readl(&dp_regs->aux_ch_sta); in exynos_dp_start_aux_transaction()
466 ret = -EAGAIN; in exynos_dp_start_aux_transaction()
481 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_write_byte_to_dpcd()
485 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_write_byte_to_dpcd()
487 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_write_byte_to_dpcd()
489 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_write_byte_to_dpcd()
493 writel(reg, &dp_regs->buf_data0); in exynos_dp_write_byte_to_dpcd()
501 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_write_byte_to_dpcd()
522 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_byte_from_dpcd()
526 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_read_byte_from_dpcd()
528 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_read_byte_from_dpcd()
530 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_read_byte_from_dpcd()
538 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_byte_from_dpcd()
546 reg = readl(&dp_regs->buf_data0); in exynos_dp_read_byte_from_dpcd()
566 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_write_bytes_to_dpcd()
571 if ((count - start_offset) > 16) in exynos_dp_write_bytes_to_dpcd()
574 cur_data_count = count - start_offset; in exynos_dp_write_bytes_to_dpcd()
580 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_write_bytes_to_dpcd()
582 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_write_bytes_to_dpcd()
584 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_write_bytes_to_dpcd()
589 writel(reg, (unsigned int)&dp_regs->buf_data0 + in exynos_dp_write_bytes_to_dpcd()
599 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_write_bytes_to_dpcd()
608 retry_cnt--; in exynos_dp_write_bytes_to_dpcd()
632 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_bytes_from_dpcd()
637 if ((count - start_offset) > 16) in exynos_dp_read_bytes_from_dpcd()
640 cur_data_count = count - start_offset; in exynos_dp_read_bytes_from_dpcd()
646 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_read_bytes_from_dpcd()
648 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_read_bytes_from_dpcd()
650 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_read_bytes_from_dpcd()
658 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_bytes_from_dpcd()
667 retry_cnt--; in exynos_dp_read_bytes_from_dpcd()
674 reg = readl((unsigned int)&dp_regs->buf_data0 + in exynos_dp_read_bytes_from_dpcd()
693 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_select_i2c_device()
694 writel(0x0, &dp_regs->aux_addr_15_8); in exynos_dp_select_i2c_device()
695 writel(0x0, &dp_regs->aux_addr_19_16); in exynos_dp_select_i2c_device()
698 writel(reg_addr, &dp_regs->buf_data0); in exynos_dp_select_i2c_device()
707 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_select_i2c_device()
728 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_byte_from_i2c()
745 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_byte_from_i2c()
755 *data = readl(&dp_regs->buf_data0); in exynos_dp_read_byte_from_i2c()
775 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_bytes_from_i2c()
778 reg = readl(&dp_regs->aux_ch_ctl2); in exynos_dp_read_bytes_from_i2c()
780 writel(reg, &dp_regs->aux_ch_ctl2); in exynos_dp_read_bytes_from_i2c()
783 * If Rx sends defer, Tx sends only reads in exynos_dp_read_bytes_from_i2c()
801 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_bytes_from_i2c()
812 reg = readl(&dp_regs->aux_rx_comm); in exynos_dp_read_bytes_from_i2c()
821 reg = readl((unsigned int)&dp_regs->buf_data0 in exynos_dp_read_bytes_from_i2c()
834 reg = readl(&dp_regs->phy_test); in exynos_dp_reset_macro()
836 writel(reg, &dp_regs->phy_test); in exynos_dp_reset_macro()
842 writel(reg, &dp_regs->phy_test); in exynos_dp_reset_macro()
854 writel(reg, &dp_regs->link_bw_set); in exynos_dp_set_link_bandwidth()
862 reg = readl(&dp_regs->link_bw_set); in exynos_dp_get_link_bandwidth()
876 writel(reg, &dp_regs->lane_count_set); in exynos_dp_set_lane_count()
881 return readl(&dp_regs->lane_count_set); in exynos_dp_get_lane_count()
888 (unsigned int)&dp_regs->ln0_link_training_ctl, in exynos_dp_get_lanex_pre_emphasis()
889 (unsigned int)&dp_regs->ln1_link_training_ctl, in exynos_dp_get_lanex_pre_emphasis()
890 (unsigned int)&dp_regs->ln2_link_training_ctl, in exynos_dp_get_lanex_pre_emphasis()
891 (unsigned int)&dp_regs->ln3_link_training_ctl, in exynos_dp_get_lanex_pre_emphasis()
902 (unsigned int)&dp_regs->ln0_link_training_ctl, in exynos_dp_set_lanex_pre_emphasis()
903 (unsigned int)&dp_regs->ln1_link_training_ctl, in exynos_dp_set_lanex_pre_emphasis()
904 (unsigned int)&dp_regs->ln2_link_training_ctl, in exynos_dp_set_lanex_pre_emphasis()
905 (unsigned int)&dp_regs->ln3_link_training_ctl, in exynos_dp_set_lanex_pre_emphasis()
917 (unsigned int)&dp_regs->ln0_link_training_ctl, in exynos_dp_set_lane_pre_emphasis()
918 (unsigned int)&dp_regs->ln1_link_training_ctl, in exynos_dp_set_lane_pre_emphasis()
919 (unsigned int)&dp_regs->ln2_link_training_ctl, in exynos_dp_set_lane_pre_emphasis()
920 (unsigned int)&dp_regs->ln3_link_training_ctl, in exynos_dp_set_lane_pre_emphasis()
961 writel(reg, &dp_regs->training_ptn_set); in exynos_dp_set_training_pattern()
969 reg = readl(&dp_regs->sys_ctl4); in exynos_dp_enable_enhanced_mode()
975 writel(reg, &dp_regs->sys_ctl4); in exynos_dp_enable_enhanced_mode()
982 reg = readl(&dp_regs->training_ptn_set); in exynos_dp_enable_scrambling()
988 writel(reg, &dp_regs->training_ptn_set); in exynos_dp_enable_scrambling()
997 writel(reg, &dp_regs->common_int_sta1); in exynos_dp_init_video()
1001 writel(reg, &dp_regs->sys_ctl1); in exynos_dp_init_video()
1012 reg = readl(&dp_regs->func_en1); in exynos_dp_config_video_slave_mode()
1015 writel(reg, &dp_regs->func_en1); in exynos_dp_config_video_slave_mode()
1018 reg = readl(&dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1020 reg |= (video_info->interlaced << INTERACE_SCAN_CFG_SHIFT); in exynos_dp_config_video_slave_mode()
1021 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1024 reg = readl(&dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1026 reg |= (video_info->v_sync_polarity << V_S_POLARITY_CFG_SHIFT); in exynos_dp_config_video_slave_mode()
1027 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1030 reg = readl(&dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1032 reg |= (video_info->h_sync_polarity << H_S_POLARITY_CFG_SHIFT); in exynos_dp_config_video_slave_mode()
1033 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1037 writel(reg, &dp_regs->soc_general_ctl); in exynos_dp_config_video_slave_mode()
1046 reg = (video_info->dynamic_range << IN_D_RANGE_SHIFT) | in exynos_dp_set_video_color_format()
1047 (video_info->color_depth << IN_BPC_SHIFT) | in exynos_dp_set_video_color_format()
1048 (video_info->color_space << IN_COLOR_F_SHIFT); in exynos_dp_set_video_color_format()
1049 writel(reg, &dp_regs->video_ctl2); in exynos_dp_set_video_color_format()
1052 reg = readl(&dp_regs->video_ctl3); in exynos_dp_set_video_color_format()
1054 if (video_info->ycbcr_coeff) in exynos_dp_set_video_color_format()
1058 writel(reg, &dp_regs->video_ctl3); in exynos_dp_set_video_color_format()
1066 struct edp_video_info video_info = priv->video_info; in exynos_dp_config_video_bist()
1070 writel(TOTAL_LINE_CFG_L(priv->disp_info.v_total), in exynos_dp_config_video_bist()
1071 &dp_regs->total_ln_cfg_l); in exynos_dp_config_video_bist()
1072 writel(TOTAL_LINE_CFG_H(priv->disp_info.v_total), in exynos_dp_config_video_bist()
1073 &dp_regs->total_ln_cfg_h); in exynos_dp_config_video_bist()
1074 writel(ACTIVE_LINE_CFG_L(priv->disp_info.v_res), in exynos_dp_config_video_bist()
1075 &dp_regs->active_ln_cfg_l); in exynos_dp_config_video_bist()
1076 writel(ACTIVE_LINE_CFG_H(priv->disp_info.v_res), in exynos_dp_config_video_bist()
1077 &dp_regs->active_ln_cfg_h); in exynos_dp_config_video_bist()
1078 writel(priv->disp_info.v_sync_width, &dp_regs->vsw_cfg); in exynos_dp_config_video_bist()
1079 writel(priv->disp_info.v_back_porch, &dp_regs->vbp_cfg); in exynos_dp_config_video_bist()
1080 writel(priv->disp_info.v_front_porch, &dp_regs->vfp_cfg); in exynos_dp_config_video_bist()
1082 writel(TOTAL_PIXEL_CFG_L(priv->disp_info.h_total), in exynos_dp_config_video_bist()
1083 &dp_regs->total_pix_cfg_l); in exynos_dp_config_video_bist()
1084 writel(TOTAL_PIXEL_CFG_H(priv->disp_info.h_total), in exynos_dp_config_video_bist()
1085 &dp_regs->total_pix_cfg_h); in exynos_dp_config_video_bist()
1086 writel(ACTIVE_PIXEL_CFG_L(priv->disp_info.h_res), in exynos_dp_config_video_bist()
1087 &dp_regs->active_pix_cfg_l); in exynos_dp_config_video_bist()
1088 writel(ACTIVE_PIXEL_CFG_H(priv->disp_info.h_res), in exynos_dp_config_video_bist()
1089 &dp_regs->active_pix_cfg_h); in exynos_dp_config_video_bist()
1090 writel(H_F_PORCH_CFG_L(priv->disp_info.h_front_porch), in exynos_dp_config_video_bist()
1091 &dp_regs->hfp_cfg_l); in exynos_dp_config_video_bist()
1092 writel(H_F_PORCH_CFG_H(priv->disp_info.h_front_porch), in exynos_dp_config_video_bist()
1093 &dp_regs->hfp_cfg_h); in exynos_dp_config_video_bist()
1094 writel(H_SYNC_PORCH_CFG_L(priv->disp_info.h_sync_width), in exynos_dp_config_video_bist()
1095 &dp_regs->hsw_cfg_l); in exynos_dp_config_video_bist()
1096 writel(H_SYNC_PORCH_CFG_H(priv->disp_info.h_sync_width), in exynos_dp_config_video_bist()
1097 &dp_regs->hsw_cfg_h); in exynos_dp_config_video_bist()
1098 writel(H_B_PORCH_CFG_L(priv->disp_info.h_back_porch), in exynos_dp_config_video_bist()
1099 &dp_regs->hbp_cfg_l); in exynos_dp_config_video_bist()
1100 writel(H_B_PORCH_CFG_H(priv->disp_info.h_back_porch), in exynos_dp_config_video_bist()
1101 &dp_regs->hbp_cfg_h); in exynos_dp_config_video_bist()
1110 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_bist()
1113 /* BIST color bar width set--set to each bar is 32 pixel width */ in exynos_dp_config_video_bist()
1140 return -1; in exynos_dp_config_video_bist()
1144 writel(reg, &dp_regs->video_ctl4); in exynos_dp_config_video_bist()
1154 reg = readl(&dp_regs->sys_ctl1); in exynos_dp_is_slave_video_stream_clock_on()
1155 writel(reg, &dp_regs->sys_ctl1); in exynos_dp_is_slave_video_stream_clock_on()
1157 reg = readl(&dp_regs->sys_ctl1); in exynos_dp_is_slave_video_stream_clock_on()
1161 return -EIO; in exynos_dp_is_slave_video_stream_clock_on()
1173 reg = readl(&dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1175 writel(reg, &dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1177 writel(reg, &dp_regs->m_vid0); in exynos_dp_set_video_cr_mn()
1179 writel(reg, &dp_regs->m_vid1); in exynos_dp_set_video_cr_mn()
1181 writel(reg, &dp_regs->m_vid2); in exynos_dp_set_video_cr_mn()
1184 writel(reg, &dp_regs->n_vid0); in exynos_dp_set_video_cr_mn()
1186 writel(reg, &dp_regs->n_vid1); in exynos_dp_set_video_cr_mn()
1188 writel(reg, &dp_regs->n_vid2); in exynos_dp_set_video_cr_mn()
1190 reg = readl(&dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1192 writel(reg, &dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1201 reg = readl(&dp_regs->video_ctl10); in exynos_dp_set_video_timing_mode()
1207 writel(reg, &dp_regs->video_ctl10); in exynos_dp_set_video_timing_mode()
1215 reg = readl(&dp_regs->soc_general_ctl); in exynos_dp_enable_video_master()
1224 writel(reg, &dp_regs->soc_general_ctl); in exynos_dp_enable_video_master()
1232 reg = readl(&dp_regs->video_ctl1); in exynos_dp_start_video()
1234 writel(reg, &dp_regs->video_ctl1); in exynos_dp_start_video()
1242 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_is_video_stream_on()
1243 writel(reg, &dp_regs->sys_ctl3); in exynos_dp_is_video_stream_on()
1245 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_is_video_stream_on()
1247 return -EIO; in exynos_dp_is_video_stream_on()