Lines Matching full:hdmi
74 static void dw_hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset) in dw_hdmi_write() argument
76 switch (hdmi->reg_io_width) { in dw_hdmi_write()
78 writeb(val, hdmi->ioaddr + offset); in dw_hdmi_write()
81 writel(val, hdmi->ioaddr + (offset << 2)); in dw_hdmi_write()
89 static u8 dw_hdmi_read(struct dw_hdmi *hdmi, int offset) in dw_hdmi_read() argument
91 switch (hdmi->reg_io_width) { in dw_hdmi_read()
93 return readb(hdmi->ioaddr + offset); in dw_hdmi_read()
95 return readl(hdmi->ioaddr + (offset << 2)); in dw_hdmi_read()
104 static u8 (*hdmi_read)(struct dw_hdmi *hdmi, int offset) = dw_hdmi_read;
105 static void (*hdmi_write)(struct dw_hdmi *hdmi, u8 val, int offset) =
108 static void hdmi_mod(struct dw_hdmi *hdmi, unsigned reg, u8 mask, u8 data) in hdmi_mod() argument
110 u8 val = hdmi_read(hdmi, reg) & ~mask; in hdmi_mod()
113 hdmi_write(hdmi, val, reg); in hdmi_mod()
116 static void hdmi_set_clock_regenerator(struct dw_hdmi *hdmi, u32 n, u32 cts) in hdmi_set_clock_regenerator() argument
123 hdmi_write(hdmi, n3, HDMI_AUD_N3); in hdmi_set_clock_regenerator()
132 hdmi_write(hdmi, cts3, HDMI_AUD_CTS3); in hdmi_set_clock_regenerator()
133 hdmi_write(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); in hdmi_set_clock_regenerator()
134 hdmi_write(hdmi, cts & 0xff, HDMI_AUD_CTS1); in hdmi_set_clock_regenerator()
138 hdmi_write(hdmi, n3, HDMI_AUD_N3); in hdmi_set_clock_regenerator()
139 hdmi_write(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2); in hdmi_set_clock_regenerator()
140 hdmi_write(hdmi, n & 0xff, HDMI_AUD_N3); in hdmi_set_clock_regenerator()
142 hdmi_write(hdmi, HDMI_AUD_INPUTCLKFS_128, HDMI_AUD_INPUTCLKFS); in hdmi_set_clock_regenerator()
159 static void hdmi_audio_set_samplerate(struct dw_hdmi *hdmi, u32 pixel_clk) in hdmi_audio_set_samplerate() argument
172 hdmi_set_clock_regenerator(hdmi, clk_n, clk_cts); in hdmi_audio_set_samplerate()
182 static void hdmi_video_sample(struct dw_hdmi *hdmi) in hdmi_video_sample() argument
187 switch (hdmi->hdmi_data.enc_in_bus_format) { in hdmi_video_sample()
234 hdmi_write(hdmi, val, HDMI_TX_INVID0); in hdmi_video_sample()
240 hdmi_write(hdmi, val, HDMI_TX_INSTUFFING); in hdmi_video_sample()
241 hdmi_write(hdmi, 0x0, HDMI_TX_GYDATA0); in hdmi_video_sample()
242 hdmi_write(hdmi, 0x0, HDMI_TX_GYDATA1); in hdmi_video_sample()
243 hdmi_write(hdmi, 0x0, HDMI_TX_RCRDATA0); in hdmi_video_sample()
244 hdmi_write(hdmi, 0x0, HDMI_TX_RCRDATA1); in hdmi_video_sample()
245 hdmi_write(hdmi, 0x0, HDMI_TX_BCBDATA0); in hdmi_video_sample()
246 hdmi_write(hdmi, 0x0, HDMI_TX_BCBDATA1); in hdmi_video_sample()
249 static void hdmi_video_packetize(struct dw_hdmi *hdmi) in hdmi_video_packetize() argument
261 hdmi_write(hdmi, val, HDMI_VP_PR_CD); in hdmi_video_packetize()
263 hdmi_mod(hdmi, HDMI_VP_STUFF, HDMI_VP_STUFF_PR_STUFFING_MASK, in hdmi_video_packetize()
270 hdmi_mod(hdmi, HDMI_VP_CONF, HDMI_VP_CONF_PR_EN_MASK | in hdmi_video_packetize()
273 hdmi_mod(hdmi, HDMI_VP_STUFF, HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, in hdmi_video_packetize()
276 hdmi_write(hdmi, remap_size, HDMI_VP_REMAP); in hdmi_video_packetize()
282 hdmi_mod(hdmi, HDMI_VP_CONF, HDMI_VP_CONF_BYPASS_EN_MASK | in hdmi_video_packetize()
286 hdmi_mod(hdmi, HDMI_VP_STUFF, HDMI_VP_STUFF_PP_STUFFING_MASK | in hdmi_video_packetize()
291 hdmi_mod(hdmi, HDMI_VP_CONF, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK, in hdmi_video_packetize()
295 static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi, uint bit) in hdmi_phy_test_clear() argument
297 hdmi_mod(hdmi, HDMI_PHY_TST0, HDMI_PHY_TST0_TSTCLR_MASK, in hdmi_phy_test_clear()
301 static int hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, u32 msec) in hdmi_phy_wait_i2c_done() argument
308 val = hdmi_read(hdmi, HDMI_IH_I2CMPHY_STAT0); in hdmi_phy_wait_i2c_done()
310 hdmi_write(hdmi, val, HDMI_IH_I2CMPHY_STAT0); in hdmi_phy_wait_i2c_done()
320 static void hdmi_phy_i2c_write(struct dw_hdmi *hdmi, uint data, uint addr) in hdmi_phy_i2c_write() argument
322 hdmi_write(hdmi, 0xff, HDMI_IH_I2CMPHY_STAT0); in hdmi_phy_i2c_write()
323 hdmi_write(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR); in hdmi_phy_i2c_write()
324 hdmi_write(hdmi, (u8)(data >> 8), HDMI_PHY_I2CM_DATAO_1_ADDR); in hdmi_phy_i2c_write()
325 hdmi_write(hdmi, (u8)(data >> 0), HDMI_PHY_I2CM_DATAO_0_ADDR); in hdmi_phy_i2c_write()
326 hdmi_write(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE, in hdmi_phy_i2c_write()
329 hdmi_phy_wait_i2c_done(hdmi, 1000); in hdmi_phy_i2c_write()
332 static void hdmi_phy_enable_power(struct dw_hdmi *hdmi, uint enable) in hdmi_phy_enable_power() argument
334 hdmi_mod(hdmi, HDMI_PHY_CONF0, HDMI_PHY_CONF0_PDZ_MASK, in hdmi_phy_enable_power()
338 static void hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, uint enable) in hdmi_phy_enable_tmds() argument
340 hdmi_mod(hdmi, HDMI_PHY_CONF0, HDMI_PHY_CONF0_ENTMDS_MASK, in hdmi_phy_enable_tmds()
344 static void hdmi_phy_enable_spare(struct dw_hdmi *hdmi, uint enable) in hdmi_phy_enable_spare() argument
346 hdmi_mod(hdmi, HDMI_PHY_CONF0, HDMI_PHY_CONF0_SPARECTRL_MASK, in hdmi_phy_enable_spare()
350 static void hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, uint enable) in hdmi_phy_gen2_pddq() argument
352 hdmi_mod(hdmi, HDMI_PHY_CONF0, HDMI_PHY_CONF0_GEN2_PDDQ_MASK, in hdmi_phy_gen2_pddq()
356 static void hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, uint enable) in hdmi_phy_gen2_txpwron() argument
358 hdmi_mod(hdmi, HDMI_PHY_CONF0, in hdmi_phy_gen2_txpwron()
363 static void hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, uint enable) in hdmi_phy_sel_data_en_pol() argument
365 hdmi_mod(hdmi, HDMI_PHY_CONF0, in hdmi_phy_sel_data_en_pol()
370 static void hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, in hdmi_phy_sel_interface_control() argument
373 hdmi_mod(hdmi, HDMI_PHY_CONF0, HDMI_PHY_CONF0_SELDIPIF_MASK, in hdmi_phy_sel_interface_control()
377 static int hdmi_phy_configure(struct dw_hdmi *hdmi, u32 mpixelclock) in hdmi_phy_configure() argument
382 if (!hdmi->mpll_cfg || !hdmi->phy_cfg) in hdmi_phy_configure()
386 hdmi_phy_gen2_txpwron(hdmi, 0); in hdmi_phy_configure()
389 hdmi_phy_gen2_pddq(hdmi, 1); in hdmi_phy_configure()
392 hdmi_write(hdmi, HDMI_MC_PHYRSTZ_DEASSERT, HDMI_MC_PHYRSTZ); in hdmi_phy_configure()
393 hdmi_write(hdmi, HDMI_MC_PHYRSTZ_ASSERT, HDMI_MC_PHYRSTZ); in hdmi_phy_configure()
394 hdmi_write(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST); in hdmi_phy_configure()
396 hdmi_phy_test_clear(hdmi, 1); in hdmi_phy_configure()
397 hdmi_write(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2, in hdmi_phy_configure()
399 hdmi_phy_test_clear(hdmi, 0); in hdmi_phy_configure()
402 for (i = 0; hdmi->mpll_cfg[i].mpixelclock != (~0ul); i++) in hdmi_phy_configure()
403 if (mpixelclock <= hdmi->mpll_cfg[i].mpixelclock) in hdmi_phy_configure()
406 hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].cpce, PHY_OPMODE_PLLCFG); in hdmi_phy_configure()
407 hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].gmp, PHY_PLLGMPCTRL); in hdmi_phy_configure()
408 hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].curr, PHY_PLLCURRCTRL); in hdmi_phy_configure()
410 hdmi_phy_i2c_write(hdmi, 0x0000, PHY_PLLPHBYCTRL); in hdmi_phy_configure()
411 hdmi_phy_i2c_write(hdmi, 0x0006, PHY_PLLCLKBISTPHASE); in hdmi_phy_configure()
413 for (i = 0; hdmi->phy_cfg[i].mpixelclock != (~0ul); i++) in hdmi_phy_configure()
414 if (mpixelclock <= hdmi->phy_cfg[i].mpixelclock) in hdmi_phy_configure()
422 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].term, PHY_TXTERM); in hdmi_phy_configure()
423 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].sym_ctr, PHY_CKSYMTXCTRL); in hdmi_phy_configure()
424 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].vlev_ctr, PHY_VLEVCTRL); in hdmi_phy_configure()
427 hdmi_phy_i2c_write(hdmi, 0x8000, PHY_CKCALCTRL); in hdmi_phy_configure()
429 hdmi_phy_enable_power(hdmi, 1); in hdmi_phy_configure()
432 hdmi_phy_enable_tmds(hdmi, 0); in hdmi_phy_configure()
433 hdmi_phy_enable_tmds(hdmi, 1); in hdmi_phy_configure()
436 hdmi_phy_gen2_txpwron(hdmi, 1); in hdmi_phy_configure()
437 hdmi_phy_gen2_pddq(hdmi, 0); in hdmi_phy_configure()
439 hdmi_phy_enable_spare(hdmi, 1); in hdmi_phy_configure()
444 val = hdmi_read(hdmi, HDMI_PHY_STAT0); in hdmi_phy_configure()
454 static void hdmi_av_composer(struct dw_hdmi *hdmi, in hdmi_av_composer() argument
490 hdmi_write(hdmi, inv_val, HDMI_FC_INVIDCONF); in hdmi_av_composer()
493 hdmi_write(hdmi, edid->hactive.typ >> 8, HDMI_FC_INHACTV1); in hdmi_av_composer()
494 hdmi_write(hdmi, edid->hactive.typ, HDMI_FC_INHACTV0); in hdmi_av_composer()
497 hdmi_write(hdmi, edid->vactive.typ >> 8, HDMI_FC_INVACTV1); in hdmi_av_composer()
498 hdmi_write(hdmi, edid->vactive.typ, HDMI_FC_INVACTV0); in hdmi_av_composer()
501 hdmi_write(hdmi, hbl >> 8, HDMI_FC_INHBLANK1); in hdmi_av_composer()
502 hdmi_write(hdmi, hbl, HDMI_FC_INHBLANK0); in hdmi_av_composer()
505 hdmi_write(hdmi, vbl, HDMI_FC_INVBLANK); in hdmi_av_composer()
508 hdmi_write(hdmi, edid->hfront_porch.typ >> 8, HDMI_FC_HSYNCINDELAY1); in hdmi_av_composer()
509 hdmi_write(hdmi, edid->hfront_porch.typ, HDMI_FC_HSYNCINDELAY0); in hdmi_av_composer()
512 hdmi_write(hdmi, edid->vfront_porch.typ, HDMI_FC_VSYNCINDELAY); in hdmi_av_composer()
515 hdmi_write(hdmi, edid->hsync_len.typ >> 8, HDMI_FC_HSYNCINWIDTH1); in hdmi_av_composer()
516 hdmi_write(hdmi, edid->hsync_len.typ, HDMI_FC_HSYNCINWIDTH0); in hdmi_av_composer()
519 hdmi_write(hdmi, edid->vsync_len.typ, HDMI_FC_VSYNCINWIDTH); in hdmi_av_composer()
563 static int is_color_space_interpolation(struct dw_hdmi *hdmi) in is_color_space_interpolation() argument
565 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format)) in is_color_space_interpolation()
568 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) || in is_color_space_interpolation()
569 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) in is_color_space_interpolation()
575 static int is_color_space_decimation(struct dw_hdmi *hdmi) in is_color_space_decimation() argument
577 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in is_color_space_decimation()
580 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) || in is_color_space_decimation()
581 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format)) in is_color_space_decimation()
618 static int is_color_space_conversion(struct dw_hdmi *hdmi) in is_color_space_conversion() argument
620 return hdmi->hdmi_data.enc_in_bus_format != in is_color_space_conversion()
621 hdmi->hdmi_data.enc_out_bus_format; in is_color_space_conversion()
624 static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) in dw_hdmi_update_csc_coeffs() argument
630 if (is_color_space_conversion(hdmi)) { in dw_hdmi_update_csc_coeffs()
631 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { in dw_hdmi_update_csc_coeffs()
634 hdmi->hdmi_data.enc_in_bus_format)) { in dw_hdmi_update_csc_coeffs()
646 hdmi_write(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2); in dw_hdmi_update_csc_coeffs()
647 hdmi_write(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2); in dw_hdmi_update_csc_coeffs()
648 hdmi_write(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2); in dw_hdmi_update_csc_coeffs()
649 hdmi_write(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2); in dw_hdmi_update_csc_coeffs()
650 hdmi_write(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2); in dw_hdmi_update_csc_coeffs()
651 hdmi_write(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2); in dw_hdmi_update_csc_coeffs()
654 hdmi_mod(hdmi, HDMI_CSC_SCALE, HDMI_CSC_SCALE_CSCSCALE_MASK, csc_scale); in dw_hdmi_update_csc_coeffs()
657 static void hdmi_video_csc(struct dw_hdmi *hdmi) in hdmi_video_csc() argument
664 if (is_color_space_interpolation(hdmi)) in hdmi_video_csc()
666 else if (is_color_space_decimation(hdmi)) in hdmi_video_csc()
669 switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_csc()
688 hdmi_write(hdmi, interpolation | decimation, HDMI_CSC_CFG); in hdmi_video_csc()
690 hdmi_mod(hdmi, HDMI_CSC_SCALE, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK, in hdmi_video_csc()
693 dw_hdmi_update_csc_coeffs(hdmi); in hdmi_video_csc()
696 /* hdmi initialization step b.4 */
697 static void hdmi_enable_video_path(struct dw_hdmi *hdmi, bool audio) in hdmi_enable_video_path() argument
702 hdmi_write(hdmi, 12, HDMI_FC_CTRLDUR); in hdmi_enable_video_path()
703 hdmi_write(hdmi, 32, HDMI_FC_EXCTRLDUR); in hdmi_enable_video_path()
704 hdmi_write(hdmi, 1, HDMI_FC_EXCTRLSPAC); in hdmi_enable_video_path()
707 hdmi_write(hdmi, 0x0b, HDMI_FC_CH0PREAM); in hdmi_enable_video_path()
708 hdmi_write(hdmi, 0x16, HDMI_FC_CH1PREAM); in hdmi_enable_video_path()
709 hdmi_write(hdmi, 0x21, HDMI_FC_CH2PREAM); in hdmi_enable_video_path()
711 hdmi_write(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS, in hdmi_enable_video_path()
717 hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS); in hdmi_enable_video_path()
720 hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS); in hdmi_enable_video_path()
723 if (is_color_space_conversion(hdmi)) { in hdmi_enable_video_path()
725 hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS); in hdmi_enable_video_path()
729 if (is_color_space_conversion(hdmi)) in hdmi_enable_video_path()
730 hdmi_write(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH, in hdmi_enable_video_path()
733 hdmi_write(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS, in hdmi_enable_video_path()
738 hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS); in hdmi_enable_video_path()
743 static void hdmi_clear_overflow(struct dw_hdmi *hdmi) in hdmi_clear_overflow() argument
748 hdmi_write(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ); in hdmi_clear_overflow()
750 val = hdmi_read(hdmi, HDMI_FC_INVIDCONF); in hdmi_clear_overflow()
753 hdmi_write(hdmi, val, HDMI_FC_INVIDCONF); in hdmi_clear_overflow()
756 static void hdmi_audio_set_format(struct dw_hdmi *hdmi) in hdmi_audio_set_format() argument
758 hdmi_write(hdmi, HDMI_AUD_CONF0_I2S_SELECT | HDMI_AUD_CONF0_I2S_IN_EN_0, in hdmi_audio_set_format()
762 hdmi_write(hdmi, HDMI_AUD_CONF1_I2S_MODE_STANDARD_MODE | in hdmi_audio_set_format()
765 hdmi_write(hdmi, 0x00, HDMI_AUD_CONF2); in hdmi_audio_set_format()
768 static void hdmi_audio_fifo_reset(struct dw_hdmi *hdmi) in hdmi_audio_fifo_reset() argument
770 hdmi_write(hdmi, (u8)~HDMI_MC_SWRSTZ_II2SSWRST_REQ, HDMI_MC_SWRSTZ); in hdmi_audio_fifo_reset()
771 hdmi_write(hdmi, HDMI_AUD_CONF0_SW_AUDIO_FIFO_RST, HDMI_AUD_CONF0); in hdmi_audio_fifo_reset()
773 hdmi_write(hdmi, 0x00, HDMI_AUD_INT); in hdmi_audio_fifo_reset()
774 hdmi_write(hdmi, 0x00, HDMI_AUD_INT1); in hdmi_audio_fifo_reset()
777 static int hdmi_get_plug_in_status(struct dw_hdmi *hdmi) in hdmi_get_plug_in_status() argument
779 uint val = hdmi_read(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD; in hdmi_get_plug_in_status()
784 static int hdmi_ddc_wait_i2c_done(struct dw_hdmi *hdmi, int msec) in hdmi_ddc_wait_i2c_done() argument
791 val = hdmi_read(hdmi, HDMI_IH_I2CM_STAT0); in hdmi_ddc_wait_i2c_done()
793 hdmi_write(hdmi, val, HDMI_IH_I2CM_STAT0); in hdmi_ddc_wait_i2c_done()
803 static void hdmi_ddc_reset(struct dw_hdmi *hdmi) in hdmi_ddc_reset() argument
805 hdmi_mod(hdmi, HDMI_I2CM_SOFTRSTZ, HDMI_I2CM_SOFTRSTZ_MASK, 0); in hdmi_ddc_reset()
808 static int hdmi_read_edid(struct dw_hdmi *hdmi, int block, u8 *buff) in hdmi_read_edid() argument
816 hdmi_write(hdmi, hdmi->i2c_clk_high, HDMI_I2CM_SS_SCL_HCNT_0_ADDR); in hdmi_read_edid()
817 hdmi_write(hdmi, hdmi->i2c_clk_low, HDMI_I2CM_SS_SCL_LCNT_0_ADDR); in hdmi_read_edid()
818 hdmi_mod(hdmi, HDMI_I2CM_DIV, HDMI_I2CM_DIV_FAST_STD_MODE, in hdmi_read_edid()
821 hdmi_write(hdmi, HDMI_I2CM_SLAVE_DDC_ADDR, HDMI_I2CM_SLAVE); in hdmi_read_edid()
822 hdmi_write(hdmi, HDMI_I2CM_SEGADDR_DDC, HDMI_I2CM_SEGADDR); in hdmi_read_edid()
823 hdmi_write(hdmi, block >> 1, HDMI_I2CM_SEGPTR); in hdmi_read_edid()
829 hdmi_write(hdmi, shift + n, HDMI_I2CM_ADDRESS); in hdmi_read_edid()
832 hdmi_write(hdmi, HDMI_I2CM_OP_RD8, in hdmi_read_edid()
835 hdmi_write(hdmi, HDMI_I2CM_OP_RD8_EXT, in hdmi_read_edid()
838 if (hdmi_ddc_wait_i2c_done(hdmi, 10)) { in hdmi_read_edid()
839 hdmi_ddc_reset(hdmi); in hdmi_read_edid()
844 buff[n] = hdmi_read(hdmi, HDMI_I2CM_DATAI); in hdmi_read_edid()
889 int dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint mpixelclock) in dw_hdmi_phy_cfg() argument
893 /* hdmi phy spec says to do the phy initialization sequence twice */ in dw_hdmi_phy_cfg()
895 hdmi_phy_sel_data_en_pol(hdmi, 1); in dw_hdmi_phy_cfg()
896 hdmi_phy_sel_interface_control(hdmi, 0); in dw_hdmi_phy_cfg()
897 hdmi_phy_enable_tmds(hdmi, 0); in dw_hdmi_phy_cfg()
898 hdmi_phy_enable_power(hdmi, 0); in dw_hdmi_phy_cfg()
900 ret = hdmi_phy_configure(hdmi, mpixelclock); in dw_hdmi_phy_cfg()
902 debug("hdmi phy config failure %d\n", ret); in dw_hdmi_phy_cfg()
910 int dw_hdmi_phy_wait_for_hpd(struct dw_hdmi *hdmi) in dw_hdmi_phy_wait_for_hpd() argument
916 if (hdmi_get_plug_in_status(hdmi)) in dw_hdmi_phy_wait_for_hpd()
924 void dw_hdmi_phy_init(struct dw_hdmi *hdmi) in dw_hdmi_phy_init() argument
927 hdmi_write(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL, in dw_hdmi_phy_init()
931 hdmi_write(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL | in dw_hdmi_phy_init()
936 hdmi_write(hdmi, (u8)~HDMI_PHY_HPD, HDMI_PHY_MASK0); in dw_hdmi_phy_init()
939 hdmi_write(hdmi, HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0); in dw_hdmi_phy_init()
942 int dw_hdmi_read_edid(struct dw_hdmi *hdmi, u8 *buf, int buf_size) in dw_hdmi_read_edid() argument
951 ret = hdmi_read_edid(hdmi, 0, buf); in dw_hdmi_read_edid()
958 hdmi_read_edid(hdmi, 1, buf + HDMI_EDID_BLOCK_SIZE); in dw_hdmi_read_edid()
966 int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid) in dw_hdmi_enable() argument
971 edid->hdmi_monitor ? "hdmi" : "dvi", in dw_hdmi_enable()
974 hdmi_av_composer(hdmi, edid); in dw_hdmi_enable()
976 ret = hdmi->phy_set(hdmi, edid->pixelclock.typ); in dw_hdmi_enable()
980 hdmi_enable_video_path(hdmi, edid->hdmi_monitor); in dw_hdmi_enable()
983 hdmi_audio_fifo_reset(hdmi); in dw_hdmi_enable()
984 hdmi_audio_set_format(hdmi); in dw_hdmi_enable()
985 hdmi_audio_set_samplerate(hdmi, edid->pixelclock.typ); in dw_hdmi_enable()
988 hdmi_video_packetize(hdmi); in dw_hdmi_enable()
989 hdmi_video_csc(hdmi); in dw_hdmi_enable()
990 hdmi_video_sample(hdmi); in dw_hdmi_enable()
992 hdmi_clear_overflow(hdmi); in dw_hdmi_enable()
997 void dw_hdmi_init(struct dw_hdmi *hdmi) in dw_hdmi_init() argument
1006 * disable top level interrupt bits in hdmi block in dw_hdmi_init()
1008 ih_mute = /*hdmi_read(hdmi, HDMI_IH_MUTE) |*/ in dw_hdmi_init()
1012 if (hdmi->write_reg) in dw_hdmi_init()
1013 hdmi_write = hdmi->write_reg; in dw_hdmi_init()
1015 if (hdmi->read_reg) in dw_hdmi_init()
1016 hdmi_read = hdmi->read_reg; in dw_hdmi_init()
1018 hdmi_write(hdmi, ih_mute, HDMI_IH_MUTE); in dw_hdmi_init()
1021 hdmi_write(hdmi, ~0x04, HDMI_I2CM_INT); in dw_hdmi_init()
1024 hdmi_write(hdmi, ~0x44, HDMI_I2CM_CTLINT); in dw_hdmi_init()