61 	struct lcd_dma_desc *desc;  in lcd_ctrl_init()  local
197 	desc = (struct lcd_dma_desc *)(lcdbase - 16);  in lcd_ctrl_init()
199 	desc->address = (u32)lcdbase;  in lcd_ctrl_init()
201 	desc->control = LCDC_BASECTRL_ADDIEN | LCDC_BASECTRL_DSCRIEN  in lcd_ctrl_init()
203 	desc->next = (u32)desc;  in lcd_ctrl_init()
206 	flush_dcache_range((u32)desc, (u32)desc + sizeof(*desc));  in lcd_ctrl_init()
208 	writel(desc->address, &regs->lcdc_baseaddr);  in lcd_ctrl_init()
209 	writel(desc->control, &regs->lcdc_basectrl);  in lcd_ctrl_init()
210 	writel(desc->next, &regs->lcdc_basenext);  in lcd_ctrl_init()
295 	struct lcd_dma_desc *desc;  in atmel_hlcdc_init()  local
428 	desc = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*desc));  in atmel_hlcdc_init()
429 	if (!desc)  in atmel_hlcdc_init()
432 	desc->address = (u32)uc_plat->base;  in atmel_hlcdc_init()
435 	desc->control = LCDC_BASECTRL_ADDIEN | LCDC_BASECTRL_DSCRIEN  in atmel_hlcdc_init()
437 	desc->next = (u32)desc;  in atmel_hlcdc_init()
440 	flush_dcache_range((u32)desc,  in atmel_hlcdc_init()
441 			   ALIGN(((u32)desc + sizeof(*desc)),  in atmel_hlcdc_init()
444 	writel(desc->address, &regs->lcdc_baseaddr);  in atmel_hlcdc_init()
445 	writel(desc->control, &regs->lcdc_basectrl);  in atmel_hlcdc_init()
446 	writel(desc->next, &regs->lcdc_basenext);  in atmel_hlcdc_init()