245 				u16			csr;  in service_zero_data_request()  local
268 					csr  = musb_readw(regs, MUSB_TXCSR);  in service_zero_data_request()
269 					csr |= MUSB_TXCSR_CLRDATATOG |  in service_zero_data_request()
271 					csr &= ~(MUSB_TXCSR_P_SENDSTALL |  in service_zero_data_request()
274 					musb_writew(regs, MUSB_TXCSR, csr);  in service_zero_data_request()
276 					csr  = musb_readw(regs, MUSB_RXCSR);  in service_zero_data_request()
277 					csr |= MUSB_RXCSR_CLRDATATOG |  in service_zero_data_request()
279 					csr &= ~(MUSB_RXCSR_P_SENDSTALL |  in service_zero_data_request()
281 					musb_writew(regs, MUSB_RXCSR, csr);  in service_zero_data_request()
409 				u16			csr;  in service_zero_data_request()  local
427 					csr = musb_readw(regs, MUSB_TXCSR);  in service_zero_data_request()
428 					if (csr & MUSB_TXCSR_FIFONOTEMPTY)  in service_zero_data_request()
429 						csr |= MUSB_TXCSR_FLUSHFIFO;  in service_zero_data_request()
430 					csr |= MUSB_TXCSR_P_SENDSTALL  in service_zero_data_request()
433 					musb_writew(regs, MUSB_TXCSR, csr);  in service_zero_data_request()
435 					csr = musb_readw(regs, MUSB_RXCSR);  in service_zero_data_request()
436 					csr |= MUSB_RXCSR_P_SENDSTALL  in service_zero_data_request()
440 					musb_writew(regs, MUSB_RXCSR, csr);  in service_zero_data_request()
471 	u16			count, csr;  in ep0_rxstate()  local
491 		csr = MUSB_CSR0_P_SVDRXPKTRDY;  in ep0_rxstate()
494 			csr |= MUSB_CSR0_P_DATAEND;  in ep0_rxstate()
498 		csr = MUSB_CSR0_P_SVDRXPKTRDY | MUSB_CSR0_P_SENDSTALL;  in ep0_rxstate()
505 		musb->ackpend = csr;  in ep0_rxstate()
512 	musb_writew(regs, MUSB_CSR0, csr);  in ep0_rxstate()
526 	u16			csr = MUSB_CSR0_TXPKTRDY;  in ep0_txstate()  local
550 		csr |= MUSB_CSR0_P_DATAEND;  in ep0_txstate()
556 	musb_writew(regs, MUSB_CSR0, csr);  in ep0_txstate()
564 		musb->ackpend = csr;  in ep0_txstate()
647 	u16		csr;  in musb_g_ep0_irq()  local
654 	csr = musb_readw(regs, MUSB_CSR0);  in musb_g_ep0_irq()
657 	dev_dbg(musb->controller, "csr %04x, count %d, myaddr %d, ep0stage %s\n",  in musb_g_ep0_irq()
658 			csr, len,  in musb_g_ep0_irq()
662 	if (csr & MUSB_CSR0_P_DATAEND) {  in musb_g_ep0_irq()
671 	if (csr & MUSB_CSR0_P_SENTSTALL) {  in musb_g_ep0_irq()
673 				csr & ~MUSB_CSR0_P_SENTSTALL);  in musb_g_ep0_irq()
676 		csr = musb_readw(regs, MUSB_CSR0);  in musb_g_ep0_irq()
680 	if (csr & MUSB_CSR0_P_SETUPEND) {  in musb_g_ep0_irq()
695 		csr = musb_readw(regs, MUSB_CSR0);  in musb_g_ep0_irq()
707 		if ((csr & MUSB_CSR0_TXPKTRDY) == 0) {  in musb_g_ep0_irq()
715 		if (csr & MUSB_CSR0_RXPKTRDY) {  in musb_g_ep0_irq()
760 		if (csr & MUSB_CSR0_RXPKTRDY)  in musb_g_ep0_irq()
780 		if (csr & MUSB_CSR0_RXPKTRDY) {  in musb_g_ep0_irq()
848 			dev_dbg(musb->controller, "handled %d, csr %04x, ep0stage %s\n",  in musb_g_ep0_irq()
849 				handled, csr,  in musb_g_ep0_irq()
1003 	u16			csr;  in musb_g_ep0_halt()  local
1022 	csr = musb->ackpend;  in musb_g_ep0_halt()
1032 		csr = musb_readw(regs, MUSB_CSR0);  in musb_g_ep0_halt()
1041 		csr |= MUSB_CSR0_P_SENDSTALL;  in musb_g_ep0_halt()
1042 		musb_writew(regs, MUSB_CSR0, csr);  in musb_g_ep0_halt()