Lines Matching +full:usb +full:- +full:otg +full:- +full:vbus
1 // SPDX-License-Identifier: GPL-2.0+
8 #include <usb.h>
12 #include <usb/ehci-ci.h>
14 #include <asm/arch/imx-regs.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/sys_proto.h>
19 #include <asm/mach-types.h>
58 #define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */
59 #define UCTRL_OVER_CUR_POL (1 << 8) /* OTG Polarity of Overcurrent */
60 #define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent Detection */
94 chrg_detect = &anatop->usb1_chrg_detect; in usb_power_config()
95 pll_480_ctrl_clr = &anatop->usb1_pll_480_ctrl_clr; in usb_power_config()
96 pll_480_ctrl_set = &anatop->usb1_pll_480_ctrl_set; in usb_power_config()
99 chrg_detect = &anatop->usb2_chrg_detect; in usb_power_config()
100 pll_480_ctrl_clr = &anatop->usb2_pll_480_ctrl_clr; in usb_power_config()
101 pll_480_ctrl_set = &anatop->usb2_pll_480_ctrl_set; in usb_power_config()
110 * 2. The PLL's power and output to usb in usb_power_config()
140 usb_cmd = (void __iomem *)&ehci->usbcmd; in usb_phy_enable()
189 u32 ctrl[4]; /* otg/host1-3 */
214 void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2); in usb_power_config()
215 void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1); in usb_power_config()
235 void __iomem *status = (void __iomem *)(&usbnc->phy_status); in usb_phy_mode()
252 void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]); in usb_oc_config()
256 void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1); in usb_oc_config()
270 * board_usb_phy_mode - override usb phy mode
271 * @port: usb host/otg port
274 * When usb-otg is used as usb host port, iomux pad usb_otg_id can be
276 * the phy mode that usb port is used.
287 * board_ehci_hcd_init - set usb vbus voltage
288 * @port: usb otg port
290 * Target board specific, setup iomux pad to setup supply vbus voltage
291 * for usb otg port. Machine board file overrides board_ehci_hcd_init
301 * board_ehci_power - enables/disables usb vbus voltage
302 * @port: usb otg port
303 * @on: on/off vbus voltage
305 * Enables/disables supply vbus voltage for usb otg port.
353 return -EINVAL; in ehci_hcd_init()
362 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); in ehci_hcd_init()
364 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); in ehci_hcd_init()
370 return -ENODEV; in ehci_hcd_init()
374 setbits_le32(&ehci->usbmode, CM_HOST); in ehci_hcd_init()
375 writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); in ehci_hcd_init()
376 setbits_le32(&ehci->portsc, USB_EN); in ehci_hcd_init()
398 struct ehci_mx6_priv_data *priv = dev->priv; in mx6_init_after_reset()
399 enum usb_init_type type = priv->init_type; in mx6_init_after_reset()
400 struct usb_ehci *ehci = priv->ehci; in mx6_init_after_reset()
403 ret = ehci_mx6_common_init(priv->ehci, priv->portnr); in mx6_init_after_reset()
408 if (priv->vbus_supply) { in mx6_init_after_reset()
409 ret = regulator_set_enable(priv->vbus_supply, in mx6_init_after_reset()
413 puts("Error enabling VBUS supply\n"); in mx6_init_after_reset()
422 setbits_le32(&ehci->usbmode, CM_HOST); in mx6_init_after_reset()
423 writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); in mx6_init_after_reset()
424 setbits_le32(&ehci->portsc, USB_EN); in mx6_init_after_reset()
440 const void *blob = gd->fdt_blob; in ehci_usb_phy_mode()
446 * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt. in ehci_usb_phy_mode()
453 return -EINVAL; in ehci_usb_phy_mode()
458 return -EINVAL; in ehci_usb_phy_mode()
464 plat->init_type = USB_INIT_DEVICE; in ehci_usb_phy_mode()
466 plat->init_type = USB_INIT_HOST; in ehci_usb_phy_mode()
473 plat->init_type = USB_INIT_DEVICE; in ehci_usb_phy_mode()
475 plat->init_type = USB_INIT_HOST; in ehci_usb_phy_mode()
477 return -EINVAL; in ehci_usb_phy_mode()
488 mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "dr_mode", NULL); in ehci_usb_ofdata_to_platdata()
491 plat->init_type = USB_INIT_DEVICE; in ehci_usb_ofdata_to_platdata()
493 plat->init_type = USB_INIT_HOST; in ehci_usb_ofdata_to_platdata()
494 else if (strcmp(mode, "otg") == 0) in ehci_usb_ofdata_to_platdata()
497 return -EINVAL; in ehci_usb_ofdata_to_platdata()
510 enum usb_init_type type = plat->init_type; in ehci_usb_probe()
515 priv->ehci = ehci; in ehci_usb_probe()
516 priv->portnr = dev->seq; in ehci_usb_probe()
517 priv->init_type = type; in ehci_usb_probe()
520 ret = device_get_supply_regulator(dev, "vbus-supply", in ehci_usb_probe()
521 &priv->vbus_supply); in ehci_usb_probe()
523 debug("%s: No vbus supply\n", dev->name); in ehci_usb_probe()
525 ret = ehci_mx6_common_init(ehci, priv->portnr); in ehci_usb_probe()
530 if (priv->vbus_supply) { in ehci_usb_probe()
531 ret = regulator_set_enable(priv->vbus_supply, in ehci_usb_probe()
535 puts("Error enabling VBUS supply\n"); in ehci_usb_probe()
541 if (priv->init_type == USB_INIT_HOST) { in ehci_usb_probe()
542 setbits_le32(&ehci->usbmode, CM_HOST); in ehci_usb_probe()
543 writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); in ehci_usb_probe()
544 setbits_le32(&ehci->portsc, USB_EN); in ehci_usb_probe()
549 hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); in ehci_usb_probe()
551 HC_LENGTH(ehci_readl(&(hccr)->cr_capbase))); in ehci_usb_probe()
553 return ehci_register(dev, hccr, hcor, &mx6_ehci_ops, 0, priv->init_type); in ehci_usb_probe()
557 { .compatible = "fsl,imx27-usb" },