usb/host/ehci-mx5.c

1 // SPDX-License-Identifier: GPL-2.0+
11 #include <usb/ehci-ci.h>
13 #include <asm/arch/imx-regs.h>
18 #define MX5_USBOTHER_REGS_OFFSET 0x800
21 #define MXC_OTG_OFFSET			0
22 #define MXC_H1_OFFSET			0x200
23 #define MXC_H2_OFFSET			0x400
24 #define MXC_H3_OFFSET			0x600
26 #define MXC_USBCTRL_OFFSET		0
27 #define MXC_USB_PHY_CTR_FUNC_OFFSET	0x8
28 #define MXC_USB_PHY_CTR_FUNC2_OFFSET	0xc
29 #define MXC_USB_CTRL_1_OFFSET		0x10
30 #define MXC_USBH2CTRL_OFFSET		0x14
31 #define MXC_USBH3CTRL_OFFSET		0x18
40 /* Host1 ULPI interrupt enable */
84 	int ret = 0;  in mxc_set_usbcontrol()
89 	case 0:	/* OTG port */  in mxc_set_usbcontrol()
128 	case 1:	/* Host 1 ULPI */  in mxc_set_usbcontrol()
130 		/* The clock for the USBH1 ULPI port will come externally  in mxc_set_usbcontrol()
164 	case 2: /* Host 2 ULPI */  in mxc_set_usbcontrol()
189 	case 3: /* Host 3 ULPI */  in mxc_set_usbcontrol()
213 	return 0;  in board_ehci_hcd_init()
235 	/* The only user for this is efikamx-usb */  in ehci_hcd_init()
248 		(0x200 * CONFIG_MXC_USB_PORT));  in ehci_hcd_init()
249 	*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);  in ehci_hcd_init()
251 			HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));  in ehci_hcd_init()
252 	setbits_le32(&ehci->usbmode, CM_HOST);  in ehci_hcd_init()
254 	__raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);  in ehci_hcd_init()
255 	setbits_le32(&ehci->portsc, USB_EN);  in ehci_hcd_init()
260 	/* Do board specific post-initialization */  in ehci_hcd_init()
263 	return 0;  in ehci_hcd_init()
268 	return 0;  in ehci_hcd_stop()