Lines Matching +full:usb +full:- +full:hsic +full:- +full:phy

1 // SPDX-License-Identifier: GPL-2.0+
3 * SAMSUNG EXYNOS USB HOST EHCI Controller
14 #include <usb.h>
36 * for the usb controller.
40 struct exynos_usb_phy *usb; member
47 const void *blob = gd->fdt_blob; in ehci_usb_ofdata_to_platdata()
54 plat->hcd_base = devfdt_get_addr(dev); in ehci_usb_ofdata_to_platdata()
55 if (plat->hcd_base == FDT_ADDR_T_NONE) { in ehci_usb_ofdata_to_platdata()
57 return -ENXIO; in ehci_usb_ofdata_to_platdata()
64 debug("XHCI: Can't get device node for usb3-phy controller\n"); in ehci_usb_ofdata_to_platdata()
65 return -ENODEV; in ehci_usb_ofdata_to_platdata()
71 plat->phy_base = fdtdec_get_addr(blob, node, "reg"); in ehci_usb_ofdata_to_platdata()
72 if (plat->phy_base == FDT_ADDR_T_NONE) { in ehci_usb_ofdata_to_platdata()
74 return -ENXIO; in ehci_usb_ofdata_to_platdata()
78 gpio_request_by_name(dev, "samsung,vbus-gpio", 0, in ehci_usb_ofdata_to_platdata()
79 &plat->vbus_gpio, GPIOD_IS_OUT); in ehci_usb_ofdata_to_platdata()
84 static void exynos5_setup_usb_phy(struct exynos_usb_phy *usb) in exynos5_setup_usb_phy() argument
88 clrbits_le32(&usb->usbphyctrl0, in exynos5_setup_usb_phy()
91 /* HOST Phy setting */ in exynos5_setup_usb_phy()
98 setbits_le32(&usb->usbphyctrl0, in exynos5_setup_usb_phy()
101 /* HOST Phy setting */ in exynos5_setup_usb_phy()
105 clrbits_le32(&usb->usbphyctrl0, in exynos5_setup_usb_phy()
109 /* HSIC Phy Setting */ in exynos5_setup_usb_phy()
114 clrbits_le32(&usb->hsicphyctrl1, hsic_ctrl); in exynos5_setup_usb_phy()
115 clrbits_le32(&usb->hsicphyctrl2, hsic_ctrl); in exynos5_setup_usb_phy()
123 setbits_le32(&usb->hsicphyctrl1, hsic_ctrl); in exynos5_setup_usb_phy()
124 setbits_le32(&usb->hsicphyctrl2, hsic_ctrl); in exynos5_setup_usb_phy()
128 clrbits_le32(&usb->hsicphyctrl1, HSIC_CTRL_PHYSWRST | in exynos5_setup_usb_phy()
131 clrbits_le32(&usb->hsicphyctrl2, HSIC_CTRL_PHYSWRST | in exynos5_setup_usb_phy()
137 setbits_le32(&usb->ehcictrl, in exynos5_setup_usb_phy()
144 static void exynos4412_setup_usb_phy(struct exynos4412_usb_phy *usb) in exynos4412_setup_usb_phy() argument
146 writel(CLK_24MHZ, &usb->usbphyclk); in exynos4412_setup_usb_phy()
148 clrbits_le32(&usb->usbphyctrl, (PHYPWR_NORMAL_MASK_HSIC0 | in exynos4412_setup_usb_phy()
152 setbits_le32(&usb->usbphyrstcon, (RSTCON_HOSTPHY_SWRST | RSTCON_SWRST)); in exynos4412_setup_usb_phy()
154 clrbits_le32(&usb->usbphyrstcon, (RSTCON_HOSTPHY_SWRST | RSTCON_SWRST)); in exynos4412_setup_usb_phy()
157 static void setup_usb_phy(struct exynos_usb_phy *usb) in setup_usb_phy() argument
164 exynos5_setup_usb_phy(usb); in setup_usb_phy()
168 usb); in setup_usb_phy()
171 static void exynos5_reset_usb_phy(struct exynos_usb_phy *usb) in exynos5_reset_usb_phy() argument
176 setbits_le32(&usb->usbphyctrl0, in exynos5_reset_usb_phy()
183 /* HSIC Phy reset */ in exynos5_reset_usb_phy()
189 setbits_le32(&usb->hsicphyctrl1, hsic_ctrl); in exynos5_reset_usb_phy()
190 setbits_le32(&usb->hsicphyctrl2, hsic_ctrl); in exynos5_reset_usb_phy()
193 static void exynos4412_reset_usb_phy(struct exynos4412_usb_phy *usb) in exynos4412_reset_usb_phy() argument
195 setbits_le32(&usb->usbphyctrl, (PHYPWR_NORMAL_MASK_HSIC0 | in exynos4412_reset_usb_phy()
201 static void reset_usb_phy(struct exynos_usb_phy *usb) in reset_usb_phy() argument
204 exynos5_reset_usb_phy(usb); in reset_usb_phy()
208 usb); in reset_usb_phy()
219 ctx->hcd = (struct ehci_hccr *)plat->hcd_base; in ehci_usb_probe()
220 ctx->usb = (struct exynos_usb_phy *)plat->phy_base; in ehci_usb_probe()
223 if (dm_gpio_is_valid(&plat->vbus_gpio)) in ehci_usb_probe()
224 dm_gpio_set_value(&plat->vbus_gpio, 1); in ehci_usb_probe()
226 setup_usb_phy(ctx->usb); in ehci_usb_probe()
227 hcor = (struct ehci_hcor *)((uint32_t)ctx->hcd + in ehci_usb_probe()
228 HC_LENGTH(ehci_readl(&ctx->hcd->cr_capbase))); in ehci_usb_probe()
230 return ehci_register(dev, ctx->hcd, hcor, NULL, 0, USB_INIT_HOST); in ehci_usb_probe()
241 reset_usb_phy(ctx->usb); in ehci_usb_remove()
247 { .compatible = "samsung,exynos-ehci" },