186 		debug("udccs%d = %02x\n", i, *dev->ep->reg_udccs);  in dump_state()
505 		writel(UDCCS_BI_TPC, ep->reg_udccs);  in write_fifo()
507 			writel(UDCCS_BI_TSP, ep->reg_udccs);  in write_fifo()
523 	} while (readl(ep->reg_udccs) & UDCCS_BI_TFS);  in write_fifo()
616 		udccs = readl(ep->reg_udccs);  in read_fifo()
652 		writel(UDCCS_BO_RPC, ep->reg_udccs);  in read_fifo()
815 			if ((readl(ep->reg_udccs) & UDCCS_BI_TFS) != 0  in pxa25x_ep_queue()
818 		} else if ((readl(ep->reg_udccs) & UDCCS_BO_RFS) != 0  in pxa25x_ep_queue()
912 			&& ((readl(ep->reg_udccs) & UDCCS_BI_TFS) == 0  in pxa25x_ep_set_halt()
919 	writel(UDCCS_BI_FST|UDCCS_BI_FTF, ep->reg_udccs);  in pxa25x_ep_set_halt()
931 			if (readl(ep->reg_udccs) & UDCCS_BI_SST)  in pxa25x_ep_set_halt()
955 			|| (readl(ep->reg_udccs) & UDCCS_BO_RFS) == 0)  in pxa25x_ep_fifo_status()
975 		while (((readl(ep->reg_udccs)) & UDCCS_BO_RNE) != 0)  in pxa25x_ep_fifo_flush()
983 			? 0 : UDCCS_BI_SST), ep->reg_udccs);  in pxa25x_ep_fifo_flush()
1477 		udccs = readl(ep->reg_udccs);  in handle_ep()
1484 				writel(tmp, ep->reg_udccs);  in handle_ep()
1495 				writel(tmp, ep->reg_udccs);  in handle_ep()
1646 		.reg_udccs	= &UDC_REGS->udccs[0],
1661 		.reg_udccs	= &UDC_REGS->udccs[1],
1674 		.reg_udccs	= &UDC_REGS->udccs[2],
1689 		.reg_udccs	= &UDC_REGS->udccs[3],
1702 		.reg_udccs	= &UDC_REGS->udccs[4],
1716 		.reg_udccs	= &UDC_REGS->udccs[5],
1731 		.reg_udccs	= &UDC_REGS->udccs[6],
1744 		.reg_udccs	= &UDC_REGS->udccs[7],
1758 		.reg_udccs	= &UDC_REGS->udccs[8],
1771 		.reg_udccs	= &UDC_REGS->udccs[9],
1785 		.reg_udccs	= &UDC_REGS->udccs[10],
1800 		.reg_udccs	= &UDC_REGS->udccs[11],
1813 		.reg_udccs	= &UDC_REGS->udccs[12],
1827 		.reg_udccs	= &UDC_REGS->udccs[13],
1840 		.reg_udccs	= &UDC_REGS->udccs[14],
1854 		.reg_udccs	= &UDC_REGS->udccs[15],