127 #define ast_ep_read(ep_reg, reg) \  argument
128 	__raw_readl((ep_reg) + (reg))
129 #define ast_ep_write(ep_reg, val, reg) \  argument
130 	__raw_writel((u32)val, (ep_reg) + (reg))
143 	u32 ep_reg;  in udc_stall_ep()  local
148 		ep_reg = aspeed_udc->udc_base + AST_EP_BASE +  in udc_stall_ep()
150 		ast_ep_write(ep_reg, ast_ep_read(ep_reg, AST_EP_CONFIG) |  in udc_stall_ep()
164 	u32 ep_reg, length;  in udc_endpoint_write()  local
175 	ep_reg = aspeed_udc->udc_base + AST_EP_BASE + (AST_EP_OFFSET * (ep_num - 1));  in udc_endpoint_write()
190 	ast_ep_write(ep_reg, data, AST_EP_DMA_BUFF);  in udc_endpoint_write()
191 	ast_ep_write(ep_reg, AST_EP_TX_DATA_BYTE(length), AST_EP_DMA_STS);  in udc_endpoint_write()
192 	ast_ep_write(ep_reg, AST_EP_TX_DATA_BYTE(length) | AST_EP_START_TRANS,  in udc_endpoint_write()
198 	while (ast_ep_read(ep_reg, AST_EP_DMA_STS) & 0x1) {  in udc_endpoint_write()
212 	u32 ep_reg;  in aspeed_udc_ep_handle()  local
218 	ep_reg = aspeed_udc->udc_base + AST_EP_BASE + (AST_EP_OFFSET * (ep_num - 1));  in aspeed_udc_ep_handle()
221 		nbytes = (ast_ep_read(ep_reg, AST_EP_DMA_STS) >> 16) & 0x7ff;  in aspeed_udc_ep_handle()
225 		ast_ep_write(ep_reg, AST_EP_START_TRANS, AST_EP_DMA_STS);  in aspeed_udc_ep_handle()
573 	u32 ep_reg;  in udc_setup_ep()  local
635 	ep_reg = aspeed_udc->udc_base + AST_EP_BASE + (AST_EP_OFFSET * (ep_num - 1));  in udc_setup_ep()
637 	ast_ep_write(ep_reg, EP_SINGLE_DESC_MODE, AST_EP_DMA_CTRL);  in udc_setup_ep()
638 	ast_ep_write(ep_reg, 0, AST_EP_DMA_STS);  in udc_setup_ep()
639 	ast_ep_write(ep_reg, ep_conf | EP_ENABLE, AST_EP_CONFIG);  in udc_setup_ep()
643 		ast_ep_write(ep_reg, endpoint->rcv_urb->buffer, AST_EP_DMA_BUFF);  in udc_setup_ep()
644 		ast_ep_write(ep_reg, AST_EP_START_TRANS, AST_EP_DMA_STS);  in udc_setup_ep()
647 		ast_ep_write(ep_reg, endpoint->tx_urb->buffer, AST_EP_DMA_BUFF);  in udc_setup_ep()