69 	ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow);  in lan75xx_update_flowcontrol()
72 	return lan7x_write_reg(udev, FLOW, flow);  in lan75xx_update_flowcontrol()
78 	return lan7x_write_reg(udev, LAN75XX_RFE_CTL,  in lan75xx_set_receive_filter()
86 	lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);  in lan75xx_start_tx_path()
89 	lan7x_write_reg(udev, LAN75XX_FCT_TX_CTL, FCT_TX_CTL_EN);  in lan75xx_start_tx_path()
96 	lan7x_write_reg(udev, MAC_RX,  in lan75xx_start_rx_path()
101 	lan7x_write_reg(udev, LAN75XX_FCT_RX_CTL, FCT_RX_CTL_EN);  in lan75xx_start_rx_path()
128 	return lan7x_write_reg(udev, HW_CFG, val);  in lan75xx_basic_reset()
141 	ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);  in lan75xx_write_hwaddr()
145 	ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);  in lan75xx_write_hwaddr()
149 	ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX + 4, addr_lo);  in lan75xx_write_hwaddr()
154 	ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi);  in lan75xx_write_hwaddr()
176 	ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);  in lan75xx_eth_start()
180 	ret = lan7x_write_reg(udev, LAN75XX_BURST_CAP, 0);  in lan75xx_eth_start()
184 	ret = lan7x_write_reg(udev, LAN75XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);  in lan75xx_eth_start()
190 	ret = lan7x_write_reg(udev, LAN75XX_FCT_RX_FIFO_END, write_buf);  in lan75xx_eth_start()
195 	ret = lan7x_write_reg(udev, LAN75XX_FCT_TX_FIFO_END, write_buf);  in lan75xx_eth_start()
200 	ret = lan7x_write_reg(udev, FLOW, 0);  in lan75xx_eth_start()
230 	ret = lan7x_write_reg(udev, MAC_CR, write_buf);  in lan75xx_eth_start()