Lines Matching +full:spread +full:- +full:spectrum
1 // SPDX-License-Identifier: GPL-2.0
3 * samsung_usb_phy.c - DesignWare USB3 (DWC3) PHY handling file
12 #include <asm/arch/xhci-exynos.h>
19 writel(0x0, &phy->phy_reg0); in exynos5_usb3_phy_init()
21 clrbits_le32(&phy->phy_param0, in exynos5_usb3_phy_init()
24 /* Set Loss-of-Signal Detector sensitivity */ in exynos5_usb3_phy_init()
26 setbits_le32(&phy->phy_param0, PHYPARAM0_REF_LOSLEVEL); in exynos5_usb3_phy_init()
29 writel(0x0, &phy->phy_resume); in exynos5_usb3_phy_init()
35 setbits_le32(&phy->link_system, in exynos5_usb3_phy_init()
39 /* Set Tx De-Emphasis level */ in exynos5_usb3_phy_init()
40 clrbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH_MASK); in exynos5_usb3_phy_init()
41 setbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH); in exynos5_usb3_phy_init()
43 setbits_le32(&phy->phy_batchg, PHYBATCHG_UTMI_CLKSEL); in exynos5_usb3_phy_init()
46 clrbits_le32(&phy->phy_test, in exynos5_usb3_phy_init()
51 writel(PHYUTMI_OTGDISABLE, &phy->phy_utmi); in exynos5_usb3_phy_init()
65 /* Enable spread spectrum */ in exynos5_usb3_phy_init()
70 writel(reg, &phy->phy_clk_rst); in exynos5_usb3_phy_init()
76 writel(reg, &phy->phy_clk_rst); in exynos5_usb3_phy_init()