1 // SPDX-License-Identifier: GPL-2.0
3  * dwc3-omap.c - OMAP Specific Glue layer
5  * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
10  * Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/dwc3-omap.c) and ported
13  * commit 7ee2566ff5 : usb: dwc3: dwc3-omap: get rid of ->prepare()/->complete()
20 #include <dwc3-omap-uboot.h>
21 #include <linux/usb/dwc3-omap.h>
27 #include "linux-compat.h"
122 	void __iomem		*base;  member
138 static inline u32 dwc3_omap_readl(void __iomem *base, u32 offset)  in dwc3_omap_readl()  argument
140 	return readl(base + offset);  in dwc3_omap_readl()
143 static inline void dwc3_omap_writel(void __iomem *base, u32 offset, u32 value)  in dwc3_omap_writel()  argument
145 	writel(value, base + offset);  in dwc3_omap_writel()
150 	return dwc3_omap_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS +  in dwc3_omap_read_utmi_status()
151 							omap->utmi_otg_offset);  in dwc3_omap_read_utmi_status()
156 	dwc3_omap_writel(omap->base, USBOTGSS_UTMI_OTG_STATUS +  in dwc3_omap_write_utmi_status()
157 					omap->utmi_otg_offset, value);  in dwc3_omap_write_utmi_status()
163 	return dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_0 -  in dwc3_omap_read_irq0_status()
164 						omap->irq0_offset);  in dwc3_omap_read_irq0_status()
169 	dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_0 -  in dwc3_omap_write_irq0_status()
170 						omap->irq0_offset, value);  in dwc3_omap_write_irq0_status()
176 	return dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_MISC +  in dwc3_omap_read_irqmisc_status()
177 						omap->irqmisc_offset);  in dwc3_omap_read_irqmisc_status()
182 	dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_MISC +  in dwc3_omap_write_irqmisc_status()
183 					omap->irqmisc_offset, value);  in dwc3_omap_write_irqmisc_status()
189 	dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_MISC +  in dwc3_omap_write_irqmisc_set()
190 						omap->irqmisc_offset, value);  in dwc3_omap_write_irqmisc_set()
196 	dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_0 -  in dwc3_omap_write_irq0_set()
197 						omap->irq0_offset, value);  in dwc3_omap_write_irq0_set()
202 	dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_MISC +  in dwc3_omap_write_irqmisc_clr()
203 						omap->irqmisc_offset, value);  in dwc3_omap_write_irqmisc_clr()
208 	dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_0 -  in dwc3_omap_write_irq0_clr()
209 						omap->irq0_offset, value);  in dwc3_omap_write_irq0_clr()
219 		dev_dbg(omap->dev, "ID GND\n");  in dwc3_omap_set_mailbox()
231 		dev_dbg(omap->dev, "VBUS Connect\n");  in dwc3_omap_set_mailbox()
244 		dev_dbg(omap->dev, "VBUS Disconnect\n");  in dwc3_omap_set_mailbox()
256 		dev_dbg(omap->dev, "invalid state\n");  in dwc3_omap_set_mailbox()
268 		dev_dbg(omap->dev, "DMA Disable was Cleared\n");  in dwc3_omap_interrupt()
269 		omap->dma_status = false;  in dwc3_omap_interrupt()
273 		dev_dbg(omap->dev, "OTG Event\n");  in dwc3_omap_interrupt()
276 		dev_dbg(omap->dev, "DRVVBUS Rise\n");  in dwc3_omap_interrupt()
279 		dev_dbg(omap->dev, "CHRGVBUS Rise\n");  in dwc3_omap_interrupt()
282 		dev_dbg(omap->dev, "DISCHRGVBUS Rise\n");  in dwc3_omap_interrupt()
285 		dev_dbg(omap->dev, "IDPULLUP Rise\n");  in dwc3_omap_interrupt()
288 		dev_dbg(omap->dev, "DRVVBUS Fall\n");  in dwc3_omap_interrupt()
291 		dev_dbg(omap->dev, "CHRGVBUS Fall\n");  in dwc3_omap_interrupt()
294 		dev_dbg(omap->dev, "DISCHRGVBUS Fall\n");  in dwc3_omap_interrupt()
297 		dev_dbg(omap->dev, "IDPULLUP Fall\n");  in dwc3_omap_interrupt()
335 	omap->irq_eoi_offset = USBOTGSS_EOI_OFFSET;  in dwc3_omap_map_offset()
336 	omap->irq0_offset = USBOTGSS_IRQ0_OFFSET;  in dwc3_omap_map_offset()
337 	omap->irqmisc_offset = USBOTGSS_IRQMISC_OFFSET;  in dwc3_omap_map_offset()
338 	omap->utmi_otg_offset = USBOTGSS_UTMI_OTG_OFFSET;  in dwc3_omap_map_offset()
339 	omap->debug_offset = USBOTGSS_DEBUG_OFFSET;  in dwc3_omap_map_offset()
357 		dev_dbg(omap->dev, "UNKNOWN utmi mode %d\n", utmi_mode);  in dwc3_omap_set_utmi_mode()
364  * dwc3_omap_uboot_init - dwc3 omap uboot initialization code
369  * base address and other initialization data. Returns '0' on success and
382 		return -ENOMEM;  in dwc3_omap_uboot_init()
384 	omap->base	= omap_dev->base;  in dwc3_omap_uboot_init()
385 	omap->index	= omap_dev->index;  in dwc3_omap_uboot_init()
388 	dwc3_omap_set_utmi_mode(omap, omap_dev->utmi_mode);  in dwc3_omap_uboot_init()
391 	reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG);  in dwc3_omap_uboot_init()
392 	omap->dma_status = !!(reg & USBOTGSS_SYSCONFIG_DMADISABLE);  in dwc3_omap_uboot_init()
394 	dwc3_omap_set_mailbox(omap, omap_dev->vbus_id_status);  in dwc3_omap_uboot_init()
397 	list_add_tail(&omap->list, &dwc3_omap_list);  in dwc3_omap_uboot_init()
403  * dwc3_omap_uboot_exit - dwc3 omap uboot cleanup code
418 		if (omap->index != index)  in dwc3_omap_uboot_exit()
422 		list_del(&omap->list);  in dwc3_omap_uboot_exit()
429  * dwc3_omap_uboot_interrupt_status - check the status of interrupt
442 		if (omap->index == index)  in dwc3_omap_uboot_interrupt_status()
443 			return dwc3_omap_interrupt(-1, omap);  in dwc3_omap_uboot_interrupt_status()
448 MODULE_ALIAS("platform:omap-dwc3");
451 MODULE_DESCRIPTION("DesignWare USB3 OMAP Glue Layer");