1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/timer.h>
11 #include <dt-structs.h>
12 #include <timer.h>
23 /* Driver private data. Contains timer id. Could be either 0 or 1. */
25 	struct rk_timer *timer;  member
28 static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)  in rockchip_timer_get_curr_value()  argument
33 	timebase_l = readl(&timer->timer_curr_value0);  in rockchip_timer_get_curr_value()
34 	timebase_h = readl(&timer->timer_curr_value1);  in rockchip_timer_get_curr_value()
51 		/* The timer is available */  in timer_get_boot_us()
52 		rate = timer_get_rate(gd->timer);  in timer_get_boot_us()
53 		timer_get_count(gd->timer, &ticks);  in timer_get_boot_us()
55 	} else if (ret == -EAGAIN) {  in timer_get_boot_us()
57 		ofnode node = offset_to_ofnode(-1);  in timer_get_boot_us()
58 		struct rk_timer *timer = NULL;  in timer_get_boot_us()  local
61 		 * ... so we try to access the raw timer, if it is specified  in timer_get_boot_us()
62 		 * via the tick-timer property in /chosen.  in timer_get_boot_us()
64 		node = ofnode_get_chosen_node("tick-timer");  in timer_get_boot_us()
66 			debug("%s: no /chosen/tick-timer\n", __func__);  in timer_get_boot_us()
70 		timer = (struct rk_timer *)ofnode_get_addr(node);  in timer_get_boot_us()
72 		/* This timer is down-counting */  in timer_get_boot_us()
73 		ticks = ~0uLL - rockchip_timer_get_curr_value(timer);  in timer_get_boot_us()
74 		if (ofnode_read_u32(node, "clock-frequency", &rate)) {  in timer_get_boot_us()
75 			debug("%s: could not read clock-frequency\n", __func__);  in timer_get_boot_us()
91 	uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);  in rockchip_timer_get_count()
93 	/* timers are down-counting */  in rockchip_timer_get_count()
94 	*count = ~0ull - cntr;  in rockchip_timer_get_count()
103 	priv->timer = dev_read_addr_ptr(dev);  in rockchip_clk_ofdata_to_platdata()
104 	if (!priv->timer)  in rockchip_clk_ofdata_to_platdata()
105 		return -ENOENT;  in rockchip_clk_ofdata_to_platdata()
118 	/* don't reinit, if the timer is already running and set up */  in rockchip_timer_start()
119 	if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&  in rockchip_timer_start()
120 	    (readl(&priv->timer->timer_load_count0) == reload_val_l) &&  in rockchip_timer_start()
121 	    (readl(&priv->timer->timer_load_count1) == reload_val_h))  in rockchip_timer_start()
124 	/* disable timer and reset all control */  in rockchip_timer_start()
125 	writel(0, &priv->timer->timer_ctrl_reg);  in rockchip_timer_start()
127 	writel(reload_val_l, &priv->timer->timer_load_count0);  in rockchip_timer_start()
128 	writel(reload_val_h, &priv->timer->timer_load_count1);  in rockchip_timer_start()
129 	/* enable timer */  in rockchip_timer_start()
130 	writel(1, &priv->timer->timer_ctrl_reg);  in rockchip_timer_start()
142 	priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);  in rockchip_timer_probe()
143 	uc_priv->clock_rate = plat->dtd.clock_frequency;  in rockchip_timer_probe()
154 	{ .compatible = "rockchip,rk3188-timer" },
155 	{ .compatible = "rockchip,rk3288-timer" },
156 	{ .compatible = "rockchip,rk3368-timer" },