55 	debug("ctrl0: \t\t0x%08x\n", readl(&regs->ctrlr0));  in rkspi_dump_regs()
278 	uint ctrlr0;  in rockchip_spi_claim_bus()  local
304 	ctrlr0 = OMOD_MASTER << OMOD_SHIFT;  in rockchip_spi_claim_bus()
307 	ctrlr0 |= spi_dfs << DFS_SHIFT;  in rockchip_spi_claim_bus()
311 		ctrlr0 |= SCOL_HIGH << SCOL_SHIFT;  in rockchip_spi_claim_bus()
313 		ctrlr0 |= SCPH_TOGSTA << SCPH_SHIFT;  in rockchip_spi_claim_bus()
316 	ctrlr0 |= CSM_KEEP << CSM_SHIFT;  in rockchip_spi_claim_bus()
319 	ctrlr0 |= SSN_DELAY_ONE << SSN_DELAY_SHIFT;  in rockchip_spi_claim_bus()
322 	ctrlr0 |= SEM_LITTLE << SEM_SHIFT;  in rockchip_spi_claim_bus()
325 	ctrlr0 |= FBM_MSB << FBM_SHIFT;  in rockchip_spi_claim_bus()
328 	ctrlr0 |= spi_tf << HALF_WORD_TX_SHIFT;  in rockchip_spi_claim_bus()
331 	ctrlr0 |= 0 << RXDSD_SHIFT;  in rockchip_spi_claim_bus()
334 	ctrlr0 |= FRF_SPI << FRF_SHIFT;  in rockchip_spi_claim_bus()
337 	ctrlr0 |= (priv->tmode & TMOD_MASK) << TMOD_SHIFT;  in rockchip_spi_claim_bus()
339 	writel(ctrlr0, &regs->ctrlr0);  in rockchip_spi_claim_bus()