Lines Matching +full:cs +full:- +full:setup
1 // SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/imx-regs.h>
15 #include <asm/mach-imx/spi.h>
27 __weak int board_spi_cs_gpio(unsigned bus, unsigned cs) in board_spi_cs_gpio() argument
29 return -1; in board_spi_cs_gpio()
63 dm_gpio_set_value(&mxcs->ss, 1); in mxc_spi_cs_activate()
65 if (mxcs->gpio > 0) in mxc_spi_cs_activate()
66 gpio_set_value(mxcs->gpio, mxcs->ss_pol); in mxc_spi_cs_activate()
73 dm_gpio_set_value(&mxcs->ss, 0); in mxc_spi_cs_deactivate()
75 if (mxcs->gpio > 0) in mxc_spi_cs_deactivate()
76 gpio_set_value(mxcs->gpio, !(mxcs->ss_pol)); in mxc_spi_cs_deactivate()
92 static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) in spi_cfg_mxc() argument
97 unsigned int max_hz = mxcs->max_hz; in spi_cfg_mxc()
98 unsigned int mode = mxcs->mode; in spi_cfg_mxc()
108 ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | in spi_cfg_mxc()
123 mxcs->ctrl_reg = ctrl_reg; in spi_cfg_mxc()
130 static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) in spi_cfg_mxc() argument
136 struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; in spi_cfg_mxc()
137 unsigned int max_hz = mxcs->max_hz; in spi_cfg_mxc()
138 unsigned int mode = mxcs->mode; in spi_cfg_mxc()
146 reg_write(®s->ctrl, reg_ctrl); in spi_cfg_mxc()
148 reg_write(®s->ctrl, reg_ctrl); in spi_cfg_mxc()
151 pre_div = (clk_src - 1) / max_hz; in spi_cfg_mxc()
155 post_div -= 4; in spi_cfg_mxc()
159 return -1; in spi_cfg_mxc()
169 MXC_CSPICTRL_SELCHAN(cs); in spi_cfg_mxc()
186 reg_config = reg_read(®s->cfg); in spi_cfg_mxc()
189 * Configuration register setup in spi_cfg_mxc()
190 * The MX51 supports different setup for each SS in spi_cfg_mxc()
192 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_SSPOL))) | in spi_cfg_mxc()
193 (ss_pol << (cs + MXC_CSPICON_SSPOL)); in spi_cfg_mxc()
194 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_POL))) | in spi_cfg_mxc()
195 (sclkpol << (cs + MXC_CSPICON_POL)); in spi_cfg_mxc()
196 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_CTL))) | in spi_cfg_mxc()
197 (sclkctl << (cs + MXC_CSPICON_CTL)); in spi_cfg_mxc()
198 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) | in spi_cfg_mxc()
199 (sclkpha << (cs + MXC_CSPICON_PHA)); in spi_cfg_mxc()
202 reg_write(®s->ctrl, reg_ctrl); in spi_cfg_mxc()
204 reg_write(®s->cfg, reg_config); in spi_cfg_mxc()
207 mxcs->ctrl_reg = reg_ctrl; in spi_cfg_mxc()
208 mxcs->cfg_reg = reg_config; in spi_cfg_mxc()
211 reg_write(®s->intr, 0); in spi_cfg_mxc()
212 reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF); in spi_cfg_mxc()
223 struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; in spi_xchg_single()
230 mxcs->ctrl_reg = (mxcs->ctrl_reg & in spi_xchg_single()
232 MXC_CSPICTRL_BITCOUNT(bitlen - 1); in spi_xchg_single()
234 reg_write(®s->ctrl, mxcs->ctrl_reg | MXC_CSPICTRL_EN); in spi_xchg_single()
236 reg_write(®s->cfg, mxcs->cfg_reg); in spi_xchg_single()
240 reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF); in spi_xchg_single()
257 reg_write(®s->txdata, data); in spi_xchg_single()
258 nbytes -= cnt; in spi_xchg_single()
266 /* Buffer is not 32-bit aligned */ in spi_xchg_single()
278 reg_write(®s->txdata, data); in spi_xchg_single()
279 nbytes -= 4; in spi_xchg_single()
283 reg_write(®s->ctrl, mxcs->ctrl_reg | in spi_xchg_single()
287 status = reg_read(®s->stat); in spi_xchg_single()
292 return -1; in spi_xchg_single()
294 status = reg_read(®s->stat); in spi_xchg_single()
298 reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF); in spi_xchg_single()
305 data = reg_read(®s->rxdata); in spi_xchg_single()
307 data = cpu_to_be32(data) >> ((sizeof(data) - cnt) * 8); in spi_xchg_single()
313 nbytes -= cnt; in spi_xchg_single()
318 tmp = reg_read(®s->rxdata); in spi_xchg_single()
326 nbytes -= cnt; in spi_xchg_single()
345 return -EINVAL; in mxc_spi_xfer_internal()
366 n_bytes -= blk_size; in mxc_spi_xfer_internal()
376 static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs) in mxc_spi_claim_bus_internal() argument
378 struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; in mxc_spi_claim_bus_internal()
381 reg_write(®s->rxdata, 1); in mxc_spi_claim_bus_internal()
383 ret = spi_cfg_mxc(mxcs, cs); in mxc_spi_claim_bus_internal()
385 printf("mxc_spi: cannot setup SPI controller\n"); in mxc_spi_claim_bus_internal()
388 reg_write(®s->period, MXC_CSPIPERIOD_32KHZ); in mxc_spi_claim_bus_internal()
389 reg_write(®s->intr, 0); in mxc_spi_claim_bus_internal()
404 * Some SPI devices require active chip-select over multiple
408 * a gpio value for each cs (-1 if cs doesn't need to use gpio).
409 * You must use some unused on this SPI controller cs between 0 and 3.
412 unsigned int bus, unsigned int cs) in setup_cs_gpio() argument
416 mxcs->gpio = board_spi_cs_gpio(bus, cs); in setup_cs_gpio()
417 if (mxcs->gpio == -1) in setup_cs_gpio()
420 gpio_request(mxcs->gpio, "spi-cs"); in setup_cs_gpio()
421 ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol)); in setup_cs_gpio()
423 printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio); in setup_cs_gpio()
424 return -EINVAL; in setup_cs_gpio()
434 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, in spi_setup_slave() argument
448 mxcs = spi_alloc_slave(struct mxc_spi_slave, bus, cs); in spi_setup_slave()
454 mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; in spi_setup_slave()
456 ret = setup_cs_gpio(mxcs, bus, cs); in spi_setup_slave()
462 mxcs->base = spi_bases[bus]; in spi_setup_slave()
463 mxcs->max_hz = max_hz; in spi_setup_slave()
464 mxcs->mode = mode; in spi_setup_slave()
466 return &mxcs->slave; in spi_setup_slave()
480 return mxc_spi_claim_bus_internal(mxcs, slave->cs); in spi_claim_bus()
491 struct mxc_spi_slave *plat = bus->platdata; in mxc_spi_probe()
494 const void *blob = gd->fdt_blob; in mxc_spi_probe()
497 if (gpio_request_by_name(bus, "cs-gpios", 0, &plat->ss, in mxc_spi_probe()
499 dev_err(bus, "No cs-gpios property\n"); in mxc_spi_probe()
500 return -EINVAL; in mxc_spi_probe()
503 plat->base = devfdt_get_addr(bus); in mxc_spi_probe()
504 if (plat->base == FDT_ADDR_T_NONE) in mxc_spi_probe()
505 return -ENODEV; in mxc_spi_probe()
507 ret = dm_gpio_set_value(&plat->ss, 0); in mxc_spi_probe()
509 dev_err(bus, "Setting cs error\n"); in mxc_spi_probe()
513 mxcs->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", in mxc_spi_probe()
522 struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent); in mxc_spi_xfer()
530 struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent); in mxc_spi_claim_bus()
533 return mxc_spi_claim_bus_internal(mxcs, slave_plat->cs); in mxc_spi_claim_bus()
551 mxcs->mode = mode; in mxc_spi_set_mode()
552 mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; in mxc_spi_set_mode()
566 { .compatible = "fsl,imx51-ecspi" },