1 // SPDX-License-Identifier: GPL-2.0
59 	u32 txlen; /* dout buffer length  - op code length */
87 	writeb(cmd, &priv->regs->cmd);  in mtk_qspi_execute_cmd()
89 	return readb_poll_timeout(&priv->regs->cmd, tmp, !(val & tmp),  in mtk_qspi_execute_cmd()
95 	int len = 1 + priv->txlen + priv->rxlen;  in mtk_qspi_tx_rx()
99 		return -ERR_INVAL;  in mtk_qspi_tx_rx()
101 	writeb(len * 8, &priv->regs->cnt);  in mtk_qspi_tx_rx()
104 	idx = MTK_QSPI_MAX_RX_TX_SHIFT - 1;  in mtk_qspi_tx_rx()
107 	writeb(priv->op, &priv->regs->prgdata[idx]);  in mtk_qspi_tx_rx()
108 	idx--;  in mtk_qspi_tx_rx()
111 	for (i = 0; i < priv->txlen; i++, idx--)  in mtk_qspi_tx_rx()
112 		writeb(priv->tx[i], &priv->regs->prgdata[idx]);  in mtk_qspi_tx_rx()
116 		writeb(0, &priv->regs->prgdata[idx]);  in mtk_qspi_tx_rx()
117 		idx--;  in mtk_qspi_tx_rx()
125 	idx = priv->rxlen - 1;  in mtk_qspi_tx_rx()
128 	for (i = 0; i < priv->rxlen; i++, idx--)  in mtk_qspi_tx_rx()
129 		priv->rx[i] = readb(&priv->regs->shreg[idx]);  in mtk_qspi_tx_rx()
137 	memcpy(buf, (u8 *)priv->mem_base + addr, len);  in mtk_qspi_read()
146 		writeb(addr & 0xff, &priv->regs->radr[i]);  in mtk_qspi_set_addr()
159 		writeb(*data++, &priv->regs->wdata);  in mtk_qspi_write_single_byte()
177 		writel(data, &priv->regs->pp_dw_data);  in mtk_qspi_write_buffer()
188 	/* setting pre-fetch buffer for page program */  in mtk_qspi_write()
189 	writel(MTK_QSPI_WR_BUF_ENABLE, &priv->regs->cfg[1]);  in mtk_qspi_write()
195 		len -= MTK_QSPI_WRBUF_SIZE;  in mtk_qspi_write()
199 	/* disable pre-fetch buffer for page program */  in mtk_qspi_write()
200 	writel(MTK_QSPI_WR_BUF_DISABLE, &priv->regs->cfg[1]);  in mtk_qspi_write()
227 		return -ERR_INVAL;  in mtk_qspi_transfer()
232 			priv->op = *(u8 *)dout;  in mtk_qspi_transfer()
234 				memcpy(priv->tx, (u8 *)dout + 1,  in mtk_qspi_transfer()
235 				       bytes <= 4 ? bytes - 1 : 3);  in mtk_qspi_transfer()
236 			priv->txlen = bytes - 1;  in mtk_qspi_transfer()
244 			priv->rx = NULL;  in mtk_qspi_transfer()
245 			priv->rxlen = 0;  in mtk_qspi_transfer()
251 			 * and priv->tx should be filled 3Bytes address.  in mtk_qspi_transfer()
253 			addr = priv->tx[0] << 16 | priv->tx[1] << 8 |  in mtk_qspi_transfer()
254 			       priv->tx[2];  in mtk_qspi_transfer()
260 		if (priv->txlen >= 3) {  in mtk_qspi_transfer()
261 			/* if run to here, priv->tx[] should be the address  in mtk_qspi_transfer()
265 			addr = priv->tx[0] << 16 | priv->tx[1] << 8 |  in mtk_qspi_transfer()
266 			       priv->tx[2];  in mtk_qspi_transfer()
271 		priv->rx = (u8 *)din;  in mtk_qspi_transfer()
272 		priv->rxlen = bytes;  in mtk_qspi_transfer()
282 	struct udevice *bus = dev->parent;  in mtk_qspi_xfer()
303 	struct mtk_qspi_platdata *plat = bus->platdata;  in mtk_qspi_ofdata_to_platdata()
309 		return -ENOMEM;  in mtk_qspi_ofdata_to_platdata()
315 		return -ENOMEM;  in mtk_qspi_ofdata_to_platdata()
318 	plat->mem_base = res_mem.start;  in mtk_qspi_ofdata_to_platdata()
319 	plat->reg_base = res_reg.start;  in mtk_qspi_ofdata_to_platdata()
329 	priv->regs = (struct mtk_qspi_regs *)plat->reg_base;  in mtk_qspi_probe()
330 	priv->mem_base = (unsigned long *)plat->mem_base;  in mtk_qspi_probe()
332 	writel(MTK_QSPI_COMMAND_ENABLE, &priv->regs->wrprot);  in mtk_qspi_probe()
346 	{ .compatible = "mediatek,mt7629-qspi" },