81  * @bus_clk: DSPI input clk frequency
92 	uint bus_clk;  member
368 	int best_i, best_j, bus_clk;  in fsl_dspi_cfg_speed()  local
370 	bus_clk = priv->bus_clk;  in fsl_dspi_cfg_speed()
372 	debug("DSPI set_speed: expected SCK speed %u, bus_clk %u.\n",  in fsl_dspi_cfg_speed()
373 	      speed, bus_clk);  in fsl_dspi_cfg_speed()
378 	ret = fsl_dspi_hz_to_spi_baud(&best_i, &best_j, speed, bus_clk);  in fsl_dspi_cfg_speed()
382 		fsl_dspi_hz_to_spi_baud(&best_i, &best_j, speed, bus_clk);  in fsl_dspi_cfg_speed()
420 	dspi->priv.bus_clk = gd->bus_clk;  in spi_setup_slave()
422 	dspi->priv.bus_clk = mxc_get_clock(MXC_DSPI_CLK);  in spi_setup_slave()
552 	priv->bus_clk = gd->bus_clk;  in fsl_dspi_probe()
554 	priv->bus_clk = mxc_get_clock(MXC_DSPI_CLK);  in fsl_dspi_probe()