1 // SPDX-License-Identifier: GPL-2.0+
3  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
60  * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS
61  * if more than one CS is supported and by defining CONFIG_SYS_SPI0.
70  * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
71  * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus
80  * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
81  * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus
128 	u8 num_cs;	   /* total no. of CS available */
129 	u8 cur_cs;	   /* CS of current slave */
130 	bool half_duplex;  /* true, if master is half-duplex only */
143 	/* send out data */  in davinci_spi_xfer_data()
144 	writel(data, &ds->regs->dat1);  in davinci_spi_xfer_data()
146 	/* wait for the data to clock in/out */  in davinci_spi_xfer_data()
147 	while ((buf_reg_val = readl(&ds->regs->buf)) & SPIBUF_RXEMPTY_MASK)  in davinci_spi_xfer_data()
158 	/* enable CS hold, CS[n] and clear the data bits */  in davinci_spi_read()
160 			 (ds->cur_cs << SPIDAT1_CSNR_SHIFT));  in davinci_spi_read()
163 	while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK)  in davinci_spi_read()
167 	writel(data1_reg_val, &ds->regs->dat1);  in davinci_spi_read()
170 	while ((len--) > 1)  in davinci_spi_read()
173 	/* clear CS hold when we reach the end */  in davinci_spi_read()
188 	/* enable CS hold and clear the data bits */  in davinci_spi_write()
190 			 (ds->cur_cs << SPIDAT1_CSNR_SHIFT));  in davinci_spi_write()
193 	while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK)  in davinci_spi_write()
198 		writel(data1_reg_val | *txp++, &ds->regs->dat1);  in davinci_spi_write()
199 		len--;  in davinci_spi_write()
203 	while ((len--) > 1)  in davinci_spi_write()
206 	/* clear CS hold when we reach the end */  in davinci_spi_write()
222 	/* enable CS hold and clear the data bits */  in davinci_spi_read_write()
224 			 (ds->cur_cs << SPIDAT1_CSNR_SHIFT));  in davinci_spi_read_write()
227 	while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK)  in davinci_spi_read_write()
231 	while ((len--) > 1)  in davinci_spi_read_write()
234 	/* clear CS hold when we reach the end */  in davinci_spi_read_write()
245 static int __davinci_spi_claim_bus(struct davinci_spi_slave *ds, int cs)  in __davinci_spi_claim_bus()  argument
250 	writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);  in __davinci_spi_claim_bus()
252 	writel(SPIGCR0_SPIENA_MASK, &ds->regs->gcr0);  in __davinci_spi_claim_bus()
255 	writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, &ds->regs->gcr1);  in __davinci_spi_claim_bus()
257 	/* CS, CLK, SIMO and SOMI are functional pins */  in __davinci_spi_claim_bus()
258 	writel(((1 << cs) | SPIPC0_CLKFUN_MASK |  in __davinci_spi_claim_bus()
259 		SPIPC0_DOFUN_MASK | SPIPC0_DIFUN_MASK), &ds->regs->pc0);  in __davinci_spi_claim_bus()
262 	scalar = ((CONFIG_SYS_SPI_CLK / ds->freq) - 1) & 0xFF;  in __davinci_spi_claim_bus()
267 	 *   MSB shifted out first  in __davinci_spi_claim_bus()
269 	if (ds->mode & SPI_CPOL)  in __davinci_spi_claim_bus()
271 	if (!(ds->mode & SPI_CPHA))  in __davinci_spi_claim_bus()
274 		(mode << SPIFMT_PHASE_SHIFT), &ds->regs->fmt0);  in __davinci_spi_claim_bus()
281 		(50 << SPI_T2CDELAY_SHIFT), &ds->regs->delay);  in __davinci_spi_claim_bus()
284 	writel(SPIDEF_CSDEF0_MASK, &ds->regs->def);  in __davinci_spi_claim_bus()
287 	writel(0, &ds->regs->int0);  in __davinci_spi_claim_bus()
288 	writel(0, &ds->regs->lvl);  in __davinci_spi_claim_bus()
291 	writel((readl(&ds->regs->gcr1) | SPIGCR1_SPIENA_MASK), &ds->regs->gcr1);  in __davinci_spi_claim_bus()
299 	writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);  in __davinci_spi_release_bus()
312 		goto out;  in __davinci_spi_xfer()
315 	 * It's not clear how non-8-bit-aligned transfers are supposed to be  in __davinci_spi_xfer()
317 	 * the current SPI interface - here we terminate on receiving such a  in __davinci_spi_xfer()
323 		goto out;  in __davinci_spi_xfer()
332 	if (!ds->half_duplex)  in __davinci_spi_xfer()
338 out:  in __davinci_spi_xfer()
353 int spi_cs_is_valid(unsigned int bus, unsigned int cs)  in spi_cs_is_valid()  argument
359 		if (cs < SPI0_NUM_CS)  in spi_cs_is_valid()
364 		if (cs < SPI1_NUM_CS)  in spi_cs_is_valid()
370 		if (cs < SPI2_NUM_CS)  in spi_cs_is_valid()
391 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,  in spi_setup_slave()  argument
396 	if (!spi_cs_is_valid(bus, cs))  in spi_setup_slave()
399 	ds = spi_alloc_slave(struct davinci_spi_slave, bus, cs);  in spi_setup_slave()
405 		ds->regs = (struct davinci_spi_regs *)SPI0_BASE;  in spi_setup_slave()
409 		ds->regs = (struct davinci_spi_regs *)SPI1_BASE;  in spi_setup_slave()
414 		ds->regs = (struct davinci_spi_regs *)SPI2_BASE;  in spi_setup_slave()
421 	ds->freq = max_hz;  in spi_setup_slave()
422 	ds->mode = mode;  in spi_setup_slave()
424 	return &ds->slave;  in spi_setup_slave()
439 	ds->cur_cs = slave->cs;  in spi_xfer()
449 	ds->half_duplex = true;  in spi_claim_bus()
451 	ds->half_duplex = false;  in spi_claim_bus()
453 	return __davinci_spi_claim_bus(ds, ds->slave.cs);  in spi_claim_bus()
470 		return -EINVAL;  in davinci_spi_set_speed()
472 	ds->freq = max_hz;  in davinci_spi_set_speed()
482 	ds->mode = mode;  in davinci_spi_set_mode()
491 	struct udevice *bus = dev->parent;  in davinci_spi_claim_bus()
494 	if (slave_plat->cs >= ds->num_cs) {  in davinci_spi_claim_bus()
496 		return -EINVAL;  in davinci_spi_claim_bus()
498 	ds->half_duplex = slave_plat->mode & SPI_PREAMBLE;  in davinci_spi_claim_bus()
500 	return __davinci_spi_claim_bus(ds, slave_plat->cs);  in davinci_spi_claim_bus()
505 	struct davinci_spi_slave *ds = dev_get_priv(dev->parent);  in davinci_spi_release_bus()
516 	struct udevice *bus = dev->parent;  in davinci_spi_xfer()
519 	if (slave->cs >= ds->num_cs) {  in davinci_spi_xfer()
521 		return -EINVAL;  in davinci_spi_xfer()
523 	ds->cur_cs = slave->cs;  in davinci_spi_xfer()
539 	struct davinci_spi_platdata *plat = bus->platdata;  in davinci_spi_probe()
540 	ds->regs = plat->regs;  in davinci_spi_probe()
541 	ds->num_cs = plat->num_cs;  in davinci_spi_probe()
549 	struct davinci_spi_platdata *plat = bus->platdata;  in davinci_ofdata_to_platadata()
554 		return -EINVAL;  in davinci_ofdata_to_platadata()
556 	plat->regs = (struct davinci_spi_regs *)addr;  in davinci_ofdata_to_platadata()
557 	plat->num_cs = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus), "num-cs", 4);  in davinci_ofdata_to_platadata()
563 	{ .compatible = "ti,keystone-spi" },
564 	{ .compatible = "ti,dm6441-spi" },
565 	{ .compatible = "ti,da830-spi" },