drivers/serial/serial_uniphier.c

1 // SPDX-License-Identifier: GPL-2.0+
3  * Copyright (C) 2012-2015 Panasonic Corporation
4  * Copyright (C) 2015-2016 Socionext Inc.
19  * Note: Register map is slightly different from that of 16550.
43 	((struct uniphier_serial_priv *)dev_get_priv(dev))->membase
52 	divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);  in uniphier_serial_setbrg()
54 	writel(divisor, &port->dlr);  in uniphier_serial_setbrg()
63 	if (!(readl(&port->lsr) & UART_LSR_DR))  in uniphier_serial_getc()
64 		return -EAGAIN;  in uniphier_serial_getc()
66 	return readl(&port->rx);  in uniphier_serial_getc()
73 	if (!(readl(&port->lsr) & UART_LSR_THRE))  in uniphier_serial_putc()
74 		return -EAGAIN;  in uniphier_serial_putc()
76 	writel(c, &port->tx);  in uniphier_serial_putc()
86 		return readl(&port->lsr) & UART_LSR_DR;  in uniphier_serial_pending()
88 		return !(readl(&port->lsr) & UART_LSR_THRE);  in uniphier_serial_pending()
96 	const char *compatible;  member
101 	{ .compatible = "socionext,uniphier-ld4",  .clk_rate = 36864000 },
102 	{ .compatible = "socionext,uniphier-pro4", .clk_rate = 73728000 },
103 	{ .compatible = "socionext,uniphier-sld8", .clk_rate = 80000000 },
104 	{ .compatible = "socionext,uniphier-pro5", .clk_rate = 73728000 },
105 	{ .compatible = "socionext,uniphier-pxs2", .clk_rate = 88888888 },
106 	{ .compatible = "socionext,uniphier-ld6b", .clk_rate = 88888888 },
107 	{ .compatible = "socionext,uniphier-ld11", .clk_rate = 58823529 },
108 	{ .compatible = "socionext,uniphier-ld20", .clk_rate = 58823529 },
109 	{ .compatible = "socionext,uniphier-pxs3", .clk_rate = 58823529 },
124 		return -EINVAL;  in uniphier_serial_probe()
128 		return -ENOMEM;  in uniphier_serial_probe()
130 	priv->membase = port;  in uniphier_serial_probe()
134 	while (clk_data->compatible) {  in uniphier_serial_probe()
136 						clk_data->compatible))  in uniphier_serial_probe()
141 	if (WARN_ON(!clk_data->compatible))  in uniphier_serial_probe()
142 		return -ENOTSUPP;  in uniphier_serial_probe()
144 	priv->uartclk = clk_data->clk_rate;  in uniphier_serial_probe()
146 	tmp = readl(&port->lcr_mcr);  in uniphier_serial_probe()
149 	writel(tmp, &port->lcr_mcr);  in uniphier_serial_probe()
155 	{ .compatible = "socionext,uniphier-uart" },
167 	.name = "uniphier-uart",