drivers/serial/serial_sh.h

2  * Copy and modify from linux/drivers/serial/sh-sci.h
26 # define SCPCR  0xA4000116 /* 16 bit SCI and SCIF */
27 # define SCPDR  0xA4000136 /* 8  bit SCI and SCIF */
38  * SCIF2 (0xA4410000) -> External clock, SCK pin used as clock input
39  * SCIF0 (0xA4400000) -> Internal clock, SCK pin as serial clock output
41 # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
52 # define SCIF_ORER	   0x0200   /* overrun error bit */
54 # define SCSPTR1 0xFFE0001C /* 8 bit SCIF */
55 # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
56 # define SCIF_ORER 0x0001   /* overrun error bit */
64 # define SCSPTR1 0xffe0001c /* 8  bit SCI */
65 # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
66 # define SCIF_ORER 0x0001   /* overrun error bit */
67 # define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \
71 # define SCSPTR0 0xfe600024 /* 16 bit SCIF */
72 # define SCSPTR1 0xfe610024 /* 16 bit SCIF */
73 # define SCSPTR2 0xfe620024 /* 16 bit SCIF */
74 # define SCIF_ORER 0x0001  /* overrun error bit */
77 # define SCSPTR0 0xA4400000	  /* 16 bit SCIF */
78 # define SCIF_ORER 0x0001   /* overrun error bit */
83 # define SCSPTR0 0xffe00010	/* 16 bit SCIF */
84 # define SCSPTR1 0xffe10010	/* 16 bit SCIF */
85 # define SCSPTR2 0xffe20010	/* 16 bit SCIF */
86 # define SCSPTR3 0xffe30010	/* 16 bit SCIF */
94 # define SCIF_ORER		0x0001	/* overrun error bit */
97 # define SCPDR0			0xA405013E      /* 16 bit SCIF0 PSDR */
99 # define SCIF_ORER		0x0001  /* overrun error bit */
108 # define SCIF_ORER              0x0001  /* overrun error bit */
111 # define SCIF_ORER              0x0001  /* overrun error bit */
112 # define SCSCR_INIT(port) ((port)->type == PORT_SCIFA ? \
122 # define SCIF_ORER 0x0001  /* overrun error bit */
125 # define SCSPTR2 0xffe80020 /* 16 bit SCIF */
126 # define SCIF_ORER 0x0001   /* overrun error bit */
134 		((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */
136 		((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */
154 # define SCSPTR0 0xffe00024 /* 16 bit SCIF */
155 # define SCSPTR1 0xffe08024 /* 16 bit SCIF */
156 # define SCSPTR2 0xffe10020 /* 16 bit SCIF/IRDA */
157 # define SCIF_ORER 0x0001  /* overrun error bit */
160 # define SCSPTR0 0xff923020 /* 16 bit SCIF */
161 # define SCSPTR1 0xff924020 /* 16 bit SCIF */
162 # define SCSPTR2 0xff925020 /* 16 bit SCIF */
163 # define SCIF_ORER 0x0001  /* overrun error bit */
166 # define SCSPTR0	0xffe00024	/* 16 bit SCIF */
167 # define SCSPTR1	0xffe10024	/* 16 bit SCIF */
168 # define SCIF_ORER	0x0001		/* Overrun error bit */
180 # define SCSPTR0	0xffea0024	/* 16 bit SCIF */
181 # define SCSPTR1	0xffeb0024	/* 16 bit SCIF */
182 # define SCSPTR2	0xffec0024	/* 16 bit SCIF */
183 # define SCSPTR3	0xffed0024	/* 16 bit SCIF */
184 # define SCSPTR4	0xffee0024	/* 16 bit SCIF */
185 # define SCSPTR5	0xffef0024	/* 16 bit SCIF */
186 # define SCIF_ORER	0x0001		/* Overrun error bit */
193 # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
194 # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
195 # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
196 # define SCSPTR3 0xfffe9820 /* 16 bit SCIF */
198 #  define SCSPTR4 0xfffeA020 /* 16 bit SCIF */
199 #  define SCSPTR5 0xfffeA820 /* 16 bit SCIF */
200 #  define SCSPTR6 0xfffeB020 /* 16 bit SCIF */
201 #  define SCSPTR7 0xfffeB820 /* 16 bit SCIF */
205 # define SCSPTR0 0xe8007020 /* 16 bit SCIF */
206 # define SCSPTR1 0xe8007820 /* 16 bit SCIF */
207 # define SCSPTR2 0xe8008020 /* 16 bit SCIF */
208 # define SCSPTR3 0xe8008820 /* 16 bit SCIF */
209 # define SCSPTR4 0xe8009020 /* 16 bit SCIF */
210 # define SCSPTR5 0xe8009820 /* 16 bit SCIF */
211 # define SCSPTR6 0xe800a020 /* 16 bit SCIF */
212 # define SCSPTR7 0xe800a820 /* 16 bit SCIF */
215 # define SCSPTR0 0xf8400020 /* 16 bit SCIF */
216 # define SCSPTR1 0xf8410020 /* 16 bit SCIF */
217 # define SCSPTR2 0xf8420020 /* 16 bit SCIF */
218 # define SCIF_ORER 0x0001  /* overrun error bit */
221 # define SCSPTR0 0xffc30020		/* 16 bit SCIF */
222 # define SCSPTR1 0xffc40020		/* 16 bit SCIF */
223 # define SCSPTR2 0xffc50020		/* 16 bit SCIF */
224 # define SCSPTR3 0xffc60020		/* 16 bit SCIF */
225 # define SCIF_ORER 0x0001		/* Overrun error bit */
234 # define SCSCR_INIT(port)	(port->clk_mode == EXT_CLK ? 0x32 : 0x30)
260 #define SCI_CTRL_FLAGS_REIE ((port)->type == PORT_SCIFA ? 0 : 8)
309 # define SCIF2_TXROOM_MAX 16
320 # define SCIF_TXROOM_MAX 16
328 		(((port)->type == PORT_SCI) ? SCI_TEND	: SCIF_TEND)
330 		(((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS)
332 		(((port)->type == PORT_SCI) ? SCI_RDRF	: SCIF_RDF)
334 		(((port)->type == PORT_SCI) ? SCI_TDRE	: SCIF_TDFE)
336 		(((port)->type == PORT_SCI) ? SCI_FER	: SCIF_FER)
338 		(((port)->type == PORT_SCI) ? SCI_PER	: SCIF_PER)
340 		((port)->type == PORT_SCI) ? 0x00		: SCIF_BRK)
342 		(((port)->type == PORT_SCI) ? SCI_ORER	: SCIF_ORER)
357 # define SCxSR_RDxF_CLEAR(port)	 (((port)->type == PORT_SCI) ? 0xbc : 0x00fc)
358 # define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073)
359 # define SCxSR_TDxE_CLEAR(port)  (((port)->type == PORT_SCI) ? 0x78 : 0x00df)
360 # define SCxSR_BREAK_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x00e3)
378  * Events are used to schedule things to happen at timer-interrupt
385 		return readb(port->membase + (offset));\
387 		return readw(port->membase + (offset));\
391 		writeb(value, port->membase + (offset));\
392 	} else if ((size) == 16) {\
393 		writew(value, port->membase + (offset));\
398 		if (port->type == PORT_SCIF || port->type == PORT_SCIFB) {\
406 	if (port->type == PORT_SCIF || port->type == PORT_SCIFB) {\
524 SCIF_FNS(SCSMR,  0x00, 16)
526 SCIF_FNS(SCSCR,  0x08, 16)
528 SCIF_FNS(SCFER,  0x10, 16)
529 SCIF_FNS(SCxSR,  0x14, 16)
530 SCIF_FNS(SCFCR,  0x18, 16)
531 SCIF_FNS(SCFDR,  0x1c, 16)
538 SCIF_FNS(SCSMR,  0x00, 16)
540 SCIF_FNS(SCSCR,  0x08, 16)
541 SCIF_FNS(SCTDSR, 0x0c, 16)
542 SCIF_FNS(SCFER,  0x10, 16)
543 SCIF_FNS(SCxSR,  0x14, 16)
544 SCIF_FNS(SCFCR,  0x18, 16)
545 SCIF_FNS(SCFDR,  0x1c, 16)
546 SCIF_FNS(SCTFDR, 0x38, 16)
547 SCIF_FNS(SCRFDR, 0x3c, 16)
554 SCIx_FNS(SCSMR,  0x00, 16, 0x00, 16)
556 SCIx_FNS(SCSCR,  0x08, 16, 0x08, 16)
558 SCIx_FNS(SCxSR,  0x14, 16, 0x10, 16)
562 SCIF_FNS(SCFER,  0x10, 16)
563 SCIF_FNS(SCFCR,  0x18, 16)
564 SCIF_FNS(SCFDR,  0x1c, 16)
565 SCIF_FNS(SCLSR,  0x24, 16)
569 SCIx_FNS(SCSMR,  0,  0, 0x00, 16, 0,  0, 0x00, 16, 0,  0)
571 SCIx_FNS(SCSCR,  0,  0, 0x08, 16, 0,  0, 0x08, 16, 0,  0)
573 SCIx_FNS(SCxSR,  0,  0, 0x14, 16, 0,  0, 0x10, 16, 0,  0)
575 SCIF_FNS(SCFCR,  0,  0, 0x18, 16)
576 SCIF_FNS(SCFDR,  0,  0, 0x1C, 16)
577 SCIF_FNS(SCSPTR, 0,  0, 0x20, 16)
578 SCIF_FNS(DL,     0,  0, 0x30, 16)
579 SCIF_FNS(CKS,    0,  0, 0x34, 16)
581 SCIF_FNS(SCLSR,  0,  0, 0x14, 16)
583 SCIF_FNS(SCLSR,  0,  0, 0x24, 16)
588 SCIx_FNS(SCSMR,  0x00,  8, 0x00,  8, 0x00,  8, 0x00, 16, 0x00,  8)
590 SCIx_FNS(SCSCR,  0x04,  8, 0x08,  8, 0x04,  8, 0x08, 16, 0x02,  8)
592 SCIx_FNS(SCxSR,  0x08,  8, 0x10,  8, 0x08, 16, 0x10, 16, 0x04,  8)
594 SCIF_FNS(SCFCR,                      0x0c,  8, 0x18, 16)
599 SCIF_FNS(SCFDR,			     0x0e, 16, 0x1C, 16)
600 SCIF_FNS(SCTFDR,		     0x0e, 16, 0x1C, 16)
601 SCIF_FNS(SCRFDR,		     0x0e, 16, 0x20, 16)
602 SCIF_FNS(SCSPTR,			0,  0, 0x24, 16)
603 SCIF_FNS(SCLSR,				0,  0, 0x28, 16)
605 SCIF_FNS(SCFDR,				0,  0, 0x1C, 16)
606 SCIF_FNS(SCSPTR2,			0,  0, 0x20, 16)
607 SCIF_FNS(SCLSR2,			0,  0, 0x24, 16)
608 SCIF_FNS(SCTFDR,		     0x0e, 16, 0x1C, 16)
609 SCIF_FNS(SCRFDR,		     0x0e, 16, 0x20, 16)
610 SCIF_FNS(SCSPTR,			0,  0, 0x24, 16)
611 SCIF_FNS(SCLSR,				0,  0, 0x28, 16)
614 SCIF_FNS(SCFDR,                      0x0e, 16, 0x1C, 16)
618 SCIF_FNS(SCSPTR,                        0,  0, 0x20, 16)
620 SCIF_FNS(SCLSR,                         0,  0, 0x24, 16)
631 	unsigned short rx, tx; /* GPIO bit no */
675 	if (port->mapbase == 0xfffffe80)  in sci_rxd_in()
687 	if (port->mapbase == 0xffe00000)  in sci_rxd_in()
694 	int ch = (port->mapbase - SMR0) >> 3;  in sci_rxd_in()
697 #else /* default case for non-SCI processors */
711  * possibly command-line options would need to be added.
714  * the SCSMR register would also need to be set to non-zero values.
716  * -- Greg Banks 27Feb2000
724  * -- Stuart Menefy - 23 May 2000
728  * -- Greg Banks - 7Jul2000
730  * You "speedist"!  How will I use my 110bps ASR-33 teletype with paper
733  * -- Mitch Davis - 15 Jul 2000
740 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
749 #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
754 	if (port->type == PORT_SCIF)  in scbrr_calc()
755 		return (clk+16*bps)/(32*bps)-1;  in scbrr_calc()
757 		return ((clk*2)+16*bps)/(16*bps)-1;  in scbrr_calc()
761 #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
763 #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
765   #define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */
767   #define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */
770 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)