12 	void __iomem *base;  member
36 	void __iomem *base = plat->base;  in mvebu_serial_putc()  local
38 	while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL)  in mvebu_serial_putc()
41 	writel(ch, base + UART_TX_REG);  in mvebu_serial_putc()
49 	void __iomem *base = plat->base;  in mvebu_serial_getc()  local
51 	while (!(readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY))  in mvebu_serial_getc()
54 	return readl(base + UART_RX_REG) & 0xff;  in mvebu_serial_getc()
60 	void __iomem *base = plat->base;  in mvebu_serial_pending()  local
62 	if (readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY)  in mvebu_serial_pending()
71 	void __iomem *base = plat->base;  in mvebu_serial_setbrg()  local
77 	writel(CONFIG_UART_BASE_CLOCK / baudrate / 16, base + UART_BAUD_REG);  in mvebu_serial_setbrg()
83 	writel(0, base + UART_POSSR_REG);  in mvebu_serial_setbrg()
91 	void __iomem *base = plat->base;  in mvebu_serial_probe()  local
95 	       base + UART_CTRL_REG);  in mvebu_serial_probe()
98 	writel(0, base + UART_CTRL_REG);  in mvebu_serial_probe()
107 	plat->base = devfdt_get_addr_ptr(dev);  in mvebu_serial_ofdata_to_platdata()
140 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;  in _debug_uart_init()  local
144 	       base + UART_CTRL_REG);  in _debug_uart_init()
147 	writel(0, base + UART_CTRL_REG);  in _debug_uart_init()
153 	writel(CONFIG_UART_BASE_CLOCK / 115200 / 16, base + UART_BAUD_REG);  in _debug_uart_init()
159 	writel(0, base + UART_POSSR_REG);  in _debug_uart_init()
164 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;  in _debug_uart_putc()  local
166 	while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL)  in _debug_uart_putc()
169 	writel(ch, base + UART_TX_REG);  in _debug_uart_putc()