Lines Matching +full:write +full:- +full:data
1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2009-2012 ADVANSEE
6 * Based on the Linux rtc-imxdi.c driver, which is:
7 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
21 #include <asm/arch/imx-regs.h>
35 #define DCAMR_UNSET 0xFFFFFFFF /* doomsday - 1 sec */
39 #define DSR_WBF (1 << 10) /* Write Busy Flag */
40 #define DSR_WNF (1 << 9) /* Write Next Flag */
41 #define DSR_WCF (1 << 8) /* Write Complete Flag */
42 #define DSR_WEF (1 << 7) /* Write Error Flag */
44 #define DSR_NVF (1 << 1) /* Non-Valid Flag */
47 #define DIER_WNIE (1 << 9) /* Write Next Interrupt Enable */
48 #define DIER_WCIE (1 << 8) /* Write Complete Interrupt Enable */
49 #define DIER_WEIE (1 << 7) /* Write Error Interrupt Enable */
52 /* Driver Private Data */
59 static struct imxdi_data data; variable
62 * This function attempts to clear the dryice write-error flag.
64 * A dryice write error is similar to a bus fault and should not occur in
65 * normal operation. Clearing the flag requires another write, so the root
72 puts("### Warning: RTC - Register write error!\n"); in clear_write_error()
74 /* clear the write error flag */ in clear_write_error()
75 __raw_writel(DSR_WEF, &data.regs->dsr); in clear_write_error()
79 if ((__raw_readl(&data.regs->dsr) & DSR_WEF) == 0) in clear_write_error()
83 puts("### Error: RTC - Cannot clear write-error flag!\n"); in clear_write_error()
87 * Write a dryice register and wait until it completes.
89 * Use interrupt flags to determine when the write has completed.
93 /* do the register write */ \
94 __raw_writel((val), &data.regs->reg), \
104 /* wait for the write to finish */ in di_write_wait()
106 if ((__raw_readl(&data.regs->dsr) & (DSR_WCF | DSR_WEF)) != 0) { in di_write_wait()
113 printf("### Warning: RTC - Write-wait timeout " in di_write_wait()
116 /* check for write error */ in di_write_wait()
117 if (__raw_readl(&data.regs->dsr) & DSR_WEF) { in di_write_wait()
119 rc = -1; in di_write_wait()
132 data.regs = (struct imxdi_regs __iomem *)IMX_DRYICE_BASE; in di_init()
135 __raw_writel(0, &data.regs->dier); in di_init()
138 if (__raw_readl(&data.regs->dsr) & DSR_NVF) { in di_init()
153 if (__raw_readl(&data.regs->dsr) & DSR_CAF) { in di_init()
160 if (__raw_readl(&data.regs->dtcmr) == 0) { in di_init()
167 if (!(__raw_readl(&data.regs->dcr) & DCR_TCE)) { in di_init()
168 rc = DI_WRITE_WAIT(__raw_readl(&data.regs->dcr) | DCR_TCE, dcr); in di_init()
173 data.init_done = 1; in di_init()
185 if (!data.init_done) { in rtc_get()
191 now = __raw_readl(&data.regs->dtcmr); in rtc_get()
203 if (!data.init_done) { in rtc_set()