1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
32 		ret = clk_get_by_name(priv->dev, clkname[idx], &clk);  in stm32mp1_ddr_clk_enable()
43 	priv->clk = clk;  in stm32mp1_ddr_clk_enable()
44 	ddrphy_clk = clk_get_rate(&priv->clk);  in stm32mp1_ddr_clk_enable()
46 	debug("DDR: mem_speed (%d MHz), RCC %d MHz\n",  in stm32mp1_ddr_clk_enable()
49 	ddr_clk = abs(ddrphy_clk - mem_speed * 1000 * 1000);  in stm32mp1_ddr_clk_enable()
51 		pr_err("DDR expected freq %d MHz, current is %d MHz\n",  in stm32mp1_ddr_clk_enable()
53 		return -EINVAL;  in stm32mp1_ddr_clk_enable()
64 	struct stm32mp1_ddr_config config;  in stm32mp1_ddr_setup()  local
69 	  sizeof(config.y) / sizeof(u32)}  in stm32mp1_ddr_setup()
71 #define CTL_PARAM(x) PARAM("st,ctl-"#x, c_##x)  in stm32mp1_ddr_setup()
72 #define PHY_PARAM(x) PARAM("st,phy-"#x, p_##x)  in stm32mp1_ddr_setup()
76 		const u32 offset; /* offset in config struct */  in stm32mp1_ddr_setup()
88 	config.info.speed = dev_read_u32_default(dev, "st,mem-speed", 0);  in stm32mp1_ddr_setup()
89 	config.info.size = dev_read_u32_default(dev, "st,mem-size", 0);  in stm32mp1_ddr_setup()
90 	config.info.name = dev_read_string(dev, "st,mem-name");  in stm32mp1_ddr_setup()
91 	if (!config.info.name) {  in stm32mp1_ddr_setup()
92 		debug("%s: no st,mem-name\n", __func__);  in stm32mp1_ddr_setup()
93 		return -EINVAL;  in stm32mp1_ddr_setup()
95 	printf("RAM: %s\n", config.info.name);  in stm32mp1_ddr_setup()
99 					 (void *)((u32)&config +  in stm32mp1_ddr_setup()
107 			return -EINVAL;  in stm32mp1_ddr_setup()
114 		return -EINVAL;  in stm32mp1_ddr_setup()
118 	stm32mp1_ddr_init(priv, &config);  in stm32mp1_ddr_setup()
124 	      (u32)priv->info.base, (u32)STM32_DDR_SIZE);  in stm32mp1_ddr_setup()
126 	priv->info.size = get_ram_size((long *)priv->info.base,  in stm32mp1_ddr_setup()
129 	debug("%s : %x\n", __func__, (u32)priv->info.size);  in stm32mp1_ddr_setup()
132 	if (config.info.size != priv->info.size) {  in stm32mp1_ddr_setup()
133 		printf("DDR invalid size : 0x%x, expected 0x%x\n",  in stm32mp1_ddr_setup()
134 		       priv->info.size, config.info.size);  in stm32mp1_ddr_setup()
135 		return -EINVAL;  in stm32mp1_ddr_setup()
146 	debug("STM32MP1 DDR probe\n");  in stm32mp1_ddr_probe()
147 	priv->dev = dev;  in stm32mp1_ddr_probe()
153 	priv->ctl = regmap_get_range(map, 0);  in stm32mp1_ddr_probe()
154 	priv->phy = regmap_get_range(map, 1);  in stm32mp1_ddr_probe()
156 	priv->rcc = STM32_RCC_BASE;  in stm32mp1_ddr_probe()
158 	priv->info.base = STM32_DDR_BASE;  in stm32mp1_ddr_probe()
161 	priv->info.size = 0;  in stm32mp1_ddr_probe()
164 	priv->info.size = dev_read_u32_default(dev, "st,mem-size", 0);  in stm32mp1_ddr_probe()
173 	*info = priv->info;  in stm32mp1_ddr_get_info()
183 	{ .compatible = "st,stm32mp1-ddr" },