Lines Matching full:struct

18 struct stm32mp1_ddrctl;
19 struct stm32mp1_ddrphy;
22  * struct ddr_info
31 struct ddr_info {
32 	struct udevice *dev;
33 	struct ram_info info;
34 	struct clk clk;
35 	struct stm32mp1_ddrctl *ctl;
36 	struct stm32mp1_ddrphy *phy;
40 struct stm32mp1_ddrctrl_reg {
69 struct stm32mp1_ddrctrl_timing {
84 struct stm32mp1_ddrctrl_map {
96 struct stm32mp1_ddrctrl_perf {
116 struct stm32mp1_ddrphy_reg {
130 struct stm32mp1_ddrphy_timing {
143 struct stm32mp1_ddrphy_cal {
158 struct stm32mp1_ddr_info {
164 struct stm32mp1_ddr_config {
165 	struct stm32mp1_ddr_info info;
166 	struct stm32mp1_ddrctrl_reg c_reg;
167 	struct stm32mp1_ddrctrl_timing c_timing;
168 	struct stm32mp1_ddrctrl_map c_map;
169 	struct stm32mp1_ddrctrl_perf c_perf;
170 	struct stm32mp1_ddrphy_reg p_reg;
171 	struct stm32mp1_ddrphy_timing p_timing;
172 	struct stm32mp1_ddrphy_cal p_cal;
175 int stm32mp1_ddr_clk_enable(struct ddr_info *priv, u16 mem_speed);
176 void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir);
177 void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl);
178 void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl,
183 	struct ddr_info *priv,
184 	const struct stm32mp1_ddr_config *config);
186 int stm32mp1_dump_reg(const struct ddr_info *priv,
189 void stm32mp1_edit_reg(const struct ddr_info *priv,
193 int stm32mp1_dump_param(const struct stm32mp1_ddr_config *config,
196 void stm32mp1_edit_param(const struct stm32mp1_ddr_config *config,
201 	const struct ddr_info *priv,
202 	const struct stm32mp1_ddr_config *config);
207 	const struct stm32mp1_ddr_config *config);