Lines Matching +full:ddr +full:- +full:config

1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
17 /* DDR CTL and DDR PHY REGISTERS */
26  * @ctl: DDR controleur base address
27  * @clk: DDR clock
28  * @phy: DDR PHY base address
184 	const struct stm32mp1_ddr_config *config);
193 int stm32mp1_dump_param(const struct stm32mp1_ddr_config *config,
196 void stm32mp1_edit_param(const struct stm32mp1_ddr_config *config,
202 	const struct stm32mp1_ddr_config *config);
207 	const struct stm32mp1_ddr_config *config);