48 	struct pfuze100_regulator_desc *desc;  member
245 static struct pfuze100_regulator_desc *se_desc(struct pfuze100_regulator_desc *desc,  in se_desc()  argument
251 	for (i = 0; i < size; desc++) {  in se_desc()
252 		if (!strcmp(desc->name, name))  in se_desc()
253 			return desc;  in se_desc()
264 	struct pfuze100_regulator_desc *desc;  in pfuze100_regulator_probe()  local
268 		desc = se_desc(pfuze100_regulators,  in pfuze100_regulator_probe()
273 		desc = se_desc(pfuze200_regulators,  in pfuze100_regulator_probe()
278 		desc = se_desc(pfuze3000_regulators,  in pfuze100_regulator_probe()
286 	if (!desc) {  in pfuze100_regulator_probe()
291 	plat->desc = desc;  in pfuze100_regulator_probe()
294 	uc_pdata->type = desc->type;  in pfuze100_regulator_probe()
318 	struct pfuze100_regulator_desc *desc = plat->desc;  in pfuze100_regulator_mode()  local
321 		if (desc->type == REGULATOR_TYPE_BUCK) {  in pfuze100_regulator_mode()
324 						    desc->vsel_reg);  in pfuze100_regulator_mode()
335 					    desc->vsel_reg +  in pfuze100_regulator_mode()
346 		} else if (desc->type == REGULATOR_TYPE_LDO) {  in pfuze100_regulator_mode()
347 			val = pmic_reg_read(dev->parent, desc->vsel_reg);  in pfuze100_regulator_mode()
361 	if (desc->type == REGULATOR_TYPE_BUCK) {  in pfuze100_regulator_mode()
363 			return pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_mode()
368 				       desc->vsel_reg + PFUZE100_MODE_OFFSET,  in pfuze100_regulator_mode()
372 	} else if (desc->type == REGULATOR_TYPE_LDO) {  in pfuze100_regulator_mode()
373 		val = pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_mode()
452 	struct pfuze100_regulator_desc *desc = plat->desc;  in pfuze100_regulator_val()  local
459 			*uV = desc->voltage;  in pfuze100_regulator_val()
460 		} else if (desc->volt_table) {  in pfuze100_regulator_val()
461 			val = pmic_reg_read(dev->parent, desc->vsel_reg);  in pfuze100_regulator_val()
464 			val &= desc->vsel_mask;  in pfuze100_regulator_val()
465 			*uV = desc->volt_table[val];  in pfuze100_regulator_val()
471 			val = pmic_reg_read(dev->parent, desc->vsel_reg);  in pfuze100_regulator_val()
474 			val &= desc->vsel_mask;  in pfuze100_regulator_val()
475 			*uV = uc_pdata->min_uV + (int)val * desc->uV_step;  in pfuze100_regulator_val()
484 	} else if (desc->volt_table) {  in pfuze100_regulator_val()
485 		for (i = 0; i < desc->vsel_mask; i++) {  in pfuze100_regulator_val()
486 			if (*uV == desc->volt_table[i])  in pfuze100_regulator_val()
489 		if (i == desc->vsel_mask) {  in pfuze100_regulator_val()
494 		return pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_val()
495 				       desc->vsel_mask, i);  in pfuze100_regulator_val()
501 		return pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_val()
502 				       desc->vsel_mask,  in pfuze100_regulator_val()
503 				       (*uV - uc_pdata->min_uV) / desc->uV_step);  in pfuze100_regulator_val()