41 	struct sh_pfc *pfc;  member
56 	struct sh_pfc			pfc;  member
60 int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)  in sh_pfc_get_pin_index()  argument
65 	for (i = 0, offset = 0; i < pfc->nr_ranges; ++i) {  in sh_pfc_get_pin_index()
66 		const struct sh_pfc_pin_range *range = &pfc->ranges[i];  in sh_pfc_get_pin_index()
122 u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg)  in sh_pfc_read()  argument
127 void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data)  in sh_pfc_write()  argument
130 		(void __iomem *)(uintptr_t)pfc->info->unlock_reg;  in sh_pfc_write()
132 	if (pfc->info->unlock_reg)  in sh_pfc_write()
138 static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,  in sh_pfc_config_reg_helper()  argument
159 static void sh_pfc_write_config_reg(struct sh_pfc *pfc,  in sh_pfc_write_config_reg()  argument
165 		(void __iomem *)(uintptr_t)pfc->info->unlock_reg;  in sh_pfc_write_config_reg()
169 	sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);  in sh_pfc_write_config_reg()
171 	dev_dbg(pfc->dev, "write_reg addr = %x, value = 0x%x, field = %u, "  in sh_pfc_write_config_reg()
182 	if (pfc->info->unlock_reg)  in sh_pfc_write_config_reg()
188 static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id,  in sh_pfc_get_config_reg()  argument
196 			pfc->info->cfg_regs + k;  in sh_pfc_get_config_reg()
234 static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos,  in sh_pfc_mark_to_enum()  argument
237 	const u16 *data = pfc->info->pinmux_data;  in sh_pfc_mark_to_enum()
245 	for (k = 0; k < pfc->info->pinmux_data_size; k++) {  in sh_pfc_mark_to_enum()
252 	dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n",  in sh_pfc_mark_to_enum()
257 int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)  in sh_pfc_config_mux()  argument
269 		range = &pfc->info->output;  in sh_pfc_config_mux()
273 		range = &pfc->info->input;  in sh_pfc_config_mux()
289 		pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id);  in sh_pfc_config_mux()
300 		in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function);  in sh_pfc_config_mux()
327 		ret = sh_pfc_get_config_reg(pfc, enum_id, &cr, &field, &value);  in sh_pfc_config_mux()
331 		sh_pfc_write_config_reg(pfc, cr, field, value);  in sh_pfc_config_mux()
338 sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,  in sh_pfc_pin_to_bias_reg()  argument
343 	for (i = 0; pfc->info->bias_regs[i].puen; i++) {  in sh_pfc_pin_to_bias_reg()
344 		for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) {  in sh_pfc_pin_to_bias_reg()
345 			if (pfc->info->bias_regs[i].pins[j] == pin) {  in sh_pfc_pin_to_bias_reg()
347 				return &pfc->info->bias_regs[i];  in sh_pfc_pin_to_bias_reg()
357 static int sh_pfc_init_ranges(struct sh_pfc *pfc)  in sh_pfc_init_ranges()  argument
363 	if (pfc->info->pins[0].pin == (u16)-1) {  in sh_pfc_init_ranges()
368 		pfc->nr_ranges = 1;  in sh_pfc_init_ranges()
369 		pfc->ranges = kzalloc(sizeof(*pfc->ranges), GFP_KERNEL);  in sh_pfc_init_ranges()
370 		if (pfc->ranges == NULL)  in sh_pfc_init_ranges()
373 		pfc->ranges->start = 0;  in sh_pfc_init_ranges()
374 		pfc->ranges->end = pfc->info->nr_pins - 1;  in sh_pfc_init_ranges()
375 		pfc->nr_gpio_pins = pfc->info->nr_pins;  in sh_pfc_init_ranges()
384 	for (i = 1, nr_ranges = 1; i < pfc->info->nr_pins; ++i) {  in sh_pfc_init_ranges()
385 		if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1)  in sh_pfc_init_ranges()
389 	pfc->nr_ranges = nr_ranges;  in sh_pfc_init_ranges()
390 	pfc->ranges = kzalloc(sizeof(*pfc->ranges) * nr_ranges, GFP_KERNEL);  in sh_pfc_init_ranges()
391 	if (pfc->ranges == NULL)  in sh_pfc_init_ranges()
394 	range = pfc->ranges;  in sh_pfc_init_ranges()
395 	range->start = pfc->info->pins[0].pin;  in sh_pfc_init_ranges()
397 	for (i = 1; i < pfc->info->nr_pins; ++i) {  in sh_pfc_init_ranges()
398 		if (pfc->info->pins[i-1].pin == pfc->info->pins[i].pin - 1)  in sh_pfc_init_ranges()
401 		range->end = pfc->info->pins[i-1].pin;  in sh_pfc_init_ranges()
402 		if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO))  in sh_pfc_init_ranges()
403 			pfc->nr_gpio_pins = range->end + 1;  in sh_pfc_init_ranges()
406 		range->start = pfc->info->pins[i].pin;  in sh_pfc_init_ranges()
409 	range->end = pfc->info->pins[i-1].pin;  in sh_pfc_init_ranges()
410 	if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO))  in sh_pfc_init_ranges()
411 		pfc->nr_gpio_pins = range->end + 1;  in sh_pfc_init_ranges()
420 	return priv->pfc.info->nr_pins;  in sh_pfc_pinctrl_get_pins_count()
428 	return priv->pfc.info->pins[selector].name;  in sh_pfc_pinctrl_get_pin_name()
435 	return priv->pfc.info->nr_groups;  in sh_pfc_pinctrl_get_groups_count()
443 	return priv->pfc.info->groups[selector].name;  in sh_pfc_pinctrl_get_group_name()
450 	return priv->pfc.info->nr_functions;  in sh_pfc_pinctrl_get_functions_count()
458 	return priv->pfc.info->functions[selector].name;  in sh_pfc_pinctrl_get_function_name()
465 	struct sh_pfc *pfc = &priv->pfc;  in sh_pfc_config_mux_for_gpio()  local
470 	for (i = 1; i < pfc->info->nr_pins; i++) {  in sh_pfc_config_mux_for_gpio()
471 		if (priv->pfc.info->pins[i].pin != pin_selector)  in sh_pfc_config_mux_for_gpio()
474 		pin = &priv->pfc.info->pins[i];  in sh_pfc_config_mux_for_gpio()
481 	idx = sh_pfc_get_pin_index(pfc, pin->pin);  in sh_pfc_config_mux_for_gpio()
487 	return sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);  in sh_pfc_config_mux_for_gpio()
495 	struct sh_pfc *pfc = &priv->pfc;  in sh_pfc_pinctrl_pin_set()  local
496 	const struct sh_pfc_pin *pin = &priv->pfc.info->pins[pin_selector];  in sh_pfc_pinctrl_pin_set()
497 	int idx = sh_pfc_get_pin_index(pfc, pin->pin);  in sh_pfc_pinctrl_pin_set()
503 	return sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_FUNCTION);  in sh_pfc_pinctrl_pin_set()
511 	struct sh_pfc *pfc = &priv->pfc;  in sh_pfc_pinctrl_group_set()  local
512 	const struct sh_pfc_pin_group *grp = &priv->pfc.info->groups[group_selector];  in sh_pfc_pinctrl_group_set()
517 		int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);  in sh_pfc_pinctrl_group_set()
527 		ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);  in sh_pfc_pinctrl_group_set()
545 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc, unsigned int pin,  in sh_pfc_pinconf_find_drive_strength_reg()  argument
552 	for (reg = pfc->info->drive_regs; reg->reg; ++reg) {  in sh_pfc_pinconf_find_drive_strength_reg()
568 static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,  in sh_pfc_pinconf_set_drive_strength()  argument
576 		(void __iomem *)(uintptr_t)pfc->info->unlock_reg;  in sh_pfc_pinconf_set_drive_strength()
579 	reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);  in sh_pfc_pinconf_set_drive_strength()
606 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,  in sh_pfc_pinconf_validate()  argument
609 	int idx = sh_pfc_get_pin_index(pfc, _pin);  in sh_pfc_pinconf_validate()
610 	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_pinconf_validate()
637 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_pinconf_set()  local
640 		(void __iomem *)(uintptr_t)pfc->info->unlock_reg;  in sh_pfc_pinconf_set()
644 	if (!sh_pfc_pinconf_validate(pfc, _pin, param))  in sh_pfc_pinconf_set()
651 		if (!pfc->info->ops || !pfc->info->ops->set_bias)  in sh_pfc_pinconf_set()
654 		pfc->info->ops->set_bias(pfc, _pin, param);  in sh_pfc_pinconf_set()
659 		ret = sh_pfc_pinconf_set_drive_strength(pfc, _pin, arg);  in sh_pfc_pinconf_set()
666 		if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)  in sh_pfc_pinconf_set()
669 		bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &addr);  in sh_pfc_pinconf_set()
706 	struct sh_pfc *pfc = &priv->pfc;  in sh_pfc_pinconf_pin_set()  local
707 	const struct sh_pfc_pin *pin = &pfc->info->pins[pin_selector];  in sh_pfc_pinconf_pin_set()
720 	struct sh_pfc *pfc = &priv->pfc;  in sh_pfc_pinconf_group_set()  local
721 	const struct sh_pfc_pin_group *grp = &pfc->info->groups[group_selector];  in sh_pfc_pinconf_group_set()
750 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)  in sh_pfc_map_pins()  argument
755 	pmx->configs = kzalloc(sizeof(*pmx->configs) * pfc->info->nr_pins,  in sh_pfc_map_pins()
760 	for (i = 0; i < pfc->info->nr_pins; ++i) {  in sh_pfc_map_pins()
779 	priv->pfc.regs = devm_ioremap(dev, base, SZ_2K);  in sh_pfc_pinctrl_probe()
780 	if (!priv->pfc.regs)  in sh_pfc_pinctrl_probe()
785 		priv->pfc.info = &r8a7790_pinmux_info;  in sh_pfc_pinctrl_probe()
789 		priv->pfc.info = &r8a7791_pinmux_info;  in sh_pfc_pinctrl_probe()
793 		priv->pfc.info = &r8a7792_pinmux_info;  in sh_pfc_pinctrl_probe()
797 		priv->pfc.info = &r8a7793_pinmux_info;  in sh_pfc_pinctrl_probe()
801 		priv->pfc.info = &r8a7794_pinmux_info;  in sh_pfc_pinctrl_probe()
805 		priv->pfc.info = &r8a7795_pinmux_info;  in sh_pfc_pinctrl_probe()
809 		priv->pfc.info = &r8a7796_pinmux_info;  in sh_pfc_pinctrl_probe()
813 		priv->pfc.info = &r8a77970_pinmux_info;  in sh_pfc_pinctrl_probe()
817 		priv->pfc.info = &r8a77990_pinmux_info;  in sh_pfc_pinctrl_probe()
821 		priv->pfc.info = &r8a77995_pinmux_info;  in sh_pfc_pinctrl_probe()
824 	priv->pmx.pfc = &priv->pfc;  in sh_pfc_pinctrl_probe()
825 	sh_pfc_init_ranges(&priv->pfc);  in sh_pfc_pinctrl_probe()
826 	sh_pfc_map_pins(&priv->pfc, &priv->pmx);  in sh_pfc_pinctrl_probe()