1 // SPDX-License-Identifier: GPL-2.0+
17  * Ports are marked PORTA-PORTK or PORT0-PORT9.
28 	PIC32_PORT_J = 8, /* no PORT_I */
36 /* pin configuration descriptor */
39 	u16 pin;	/* pin number in the port */  member
43 	{.port = (_prt), .pin = (_pin), .config = (_cfg), }
45 /* In PIC32 muxing is performed at pin-level through two
46  * different set of registers - one set for input functions,
48  * Pin configuration is handled through port register.
60 	struct pic32_reg_atomic unused[8];
68 	u32 t2ck[8];
118 	struct pic32_reg_port *pinconf; /* pin configuration*/
136 			       u32 port_nr, u32 pin, u32 param)  in pic32_pinconfig_one()  argument
140 	port = &priv->pinconf[port_nr];  in pic32_pinconfig_one()
143 		writel(BIT(pin), &port->ansel.clr);  in pic32_pinconfig_one()
146 		writel(BIT(pin), &port->ansel.set);  in pic32_pinconfig_one()
149 		writel(BIT(pin), &port->tris.set);  in pic32_pinconfig_one()
152 		writel(BIT(pin), &port->tris.clr);  in pic32_pinconfig_one()
155 		writel(BIT(pin), &port->cnpu.set);  in pic32_pinconfig_one()
158 		writel(BIT(pin), &port->cnpd.set);  in pic32_pinconfig_one()
161 		writel(BIT(pin), &port->odc.set);  in pic32_pinconfig_one()
177 				    list[i].pin, list[i].config);  in pic32_pinconfig_set()
186 		/* EMDC - D11 */  in pic32_eth_pin_config()
196 		PIN_CONFIG(PIC32_PORT_H, 8, PIN_CONFIG_PIC32_DIGITAL),  in pic32_eth_pin_config()
197 		PIN_CONFIG(PIC32_PORT_H, 8, PIN_CONFIG_INPUT_ENABLE),  in pic32_eth_pin_config()
198 		PIN_CONFIG(PIC32_PORT_H, 8, PIN_CONFIG_BIAS_PULL_DOWN),  in pic32_eth_pin_config()
210 		PIN_CONFIG(PIC32_PORT_J, 8, PIN_CONFIG_PIC32_DIGITAL),  in pic32_eth_pin_config()
211 		PIN_CONFIG(PIC32_PORT_J, 8, PIN_CONFIG_OUTPUT),  in pic32_eth_pin_config()
230 		writel(0x02, priv->mux_out + PPS_OUT(PIC32_PORT_G, 9));  in pic32_pinctrl_request()
231 		writel(0x05, &priv->mux_in->u2rx); /* B0 */  in pic32_pinctrl_request()
242 		debug("%s: unknown-unhandled case\n", __func__);  in pic32_pinctrl_request()
255 	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),  in pic32_pinctrl_get_periph_id()
258 		return -EINVAL;  in pic32_pinctrl_get_periph_id()
286 	return -ENOENT;  in pic32_pinctrl_get_periph_id()
294 	debug("%s: periph %s\n", __func__, periph->name);  in pic32_pinctrl_set_state_simple()
311 	void *fdt = (void *)gd->fdt_blob;  in pic32_pinctrl_probe()
315 	ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",  in pic32_pinctrl_probe()
321 	priv->mux_in = ioremap(res.start, fdt_resource_size(&res));  in pic32_pinctrl_probe()
323 	ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",  in pic32_pinctrl_probe()
329 	priv->mux_out = ioremap(res.start, fdt_resource_size(&res));  in pic32_pinctrl_probe()
331 	ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",  in pic32_pinctrl_probe()
337 	priv->pinconf = ioremap(res.start, fdt_resource_size(&res));  in pic32_pinctrl_probe()
343 	{ .compatible = "microchip,pic32mzda-pinctrl" },