82 	void (*mux_A_periph)(struct at91_port *pio, u32 mask);
83 	void (*mux_B_periph)(struct at91_port *pio, u32 mask);
84 	void (*mux_C_periph)(struct at91_port *pio, u32 mask);
85 	void (*mux_D_periph)(struct at91_port *pio, u32 mask);
86 	void (*set_deglitch)(struct at91_port *pio, u32 mask, bool is_on);
87 	void (*set_debounce)(struct at91_port *pio, u32 mask, bool is_on,
89 	void (*set_pulldown)(struct at91_port *pio, u32 mask, bool is_on);
90 	void (*disable_schmitt_trig)(struct at91_port *pio, u32 mask);
103 static void at91_mux_disable_interrupt(struct at91_port *pio, u32 mask)  in at91_mux_disable_interrupt()  argument
105 	writel(mask, &pio->idr);  in at91_mux_disable_interrupt()
108 static void at91_mux_set_pullup(struct at91_port *pio, u32 mask, bool on)  in at91_mux_set_pullup()  argument
111 		writel(mask, &pio->mux.pio3.ppddr);  in at91_mux_set_pullup()
113 	writel(mask, (on ? &pio->puer : &pio->pudr));  in at91_mux_set_pullup()
116 static void at91_mux_set_output(struct at91_port *pio, unsigned mask,  in at91_mux_set_output()  argument
119 	writel(mask, (val ? &pio->sodr : &pio->codr));  in at91_mux_set_output()
120 	writel(mask, (is_on ? &pio->oer : &pio->odr));  in at91_mux_set_output()
123 static void at91_mux_set_multidrive(struct at91_port *pio, u32 mask, bool on)  in at91_mux_set_multidrive()  argument
125 	writel(mask, (on ? &pio->mder : &pio->mddr));  in at91_mux_set_multidrive()
128 static void at91_mux_set_A_periph(struct at91_port *pio, u32 mask)  in at91_mux_set_A_periph()  argument
130 	writel(mask, &pio->mux.pio2.asr);  in at91_mux_set_A_periph()
133 static void at91_mux_set_B_periph(struct at91_port *pio, u32 mask)  in at91_mux_set_B_periph()  argument
135 	writel(mask, &pio->mux.pio2.bsr);  in at91_mux_set_B_periph()
138 static void at91_mux_pio3_set_A_periph(struct at91_port *pio, u32 mask)  in at91_mux_pio3_set_A_periph()  argument
140 	writel(readl(&pio->mux.pio3.abcdsr1) & ~mask, &pio->mux.pio3.abcdsr1);  in at91_mux_pio3_set_A_periph()
141 	writel(readl(&pio->mux.pio3.abcdsr2) & ~mask, &pio->mux.pio3.abcdsr2);  in at91_mux_pio3_set_A_periph()
144 static void at91_mux_pio3_set_B_periph(struct at91_port *pio, u32 mask)  in at91_mux_pio3_set_B_periph()  argument
146 	writel(readl(&pio->mux.pio3.abcdsr1) | mask, &pio->mux.pio3.abcdsr1);  in at91_mux_pio3_set_B_periph()
147 	writel(readl(&pio->mux.pio3.abcdsr2) & ~mask, &pio->mux.pio3.abcdsr2);  in at91_mux_pio3_set_B_periph()
150 static void at91_mux_pio3_set_C_periph(struct at91_port *pio, u32 mask)  in at91_mux_pio3_set_C_periph()  argument
152 	writel(readl(&pio->mux.pio3.abcdsr1) & ~mask, &pio->mux.pio3.abcdsr1);  in at91_mux_pio3_set_C_periph()
153 	writel(readl(&pio->mux.pio3.abcdsr2) | mask, &pio->mux.pio3.abcdsr2);  in at91_mux_pio3_set_C_periph()
156 static void at91_mux_pio3_set_D_periph(struct at91_port *pio, u32 mask)  in at91_mux_pio3_set_D_periph()  argument
158 	writel(readl(&pio->mux.pio3.abcdsr1) | mask, &pio->mux.pio3.abcdsr1);  in at91_mux_pio3_set_D_periph()
159 	writel(readl(&pio->mux.pio3.abcdsr2) | mask, &pio->mux.pio3.abcdsr2);  in at91_mux_pio3_set_D_periph()
162 static void at91_mux_set_deglitch(struct at91_port *pio, u32 mask, bool is_on)  in at91_mux_set_deglitch()  argument
164 	writel(mask, (is_on ? &pio->ifer : &pio->ifdr));  in at91_mux_set_deglitch()
168 				       u32 mask, bool is_on)  in at91_mux_pio3_set_deglitch()  argument
171 		writel(mask, &pio->mux.pio3.ifscdr);  in at91_mux_pio3_set_deglitch()
172 	at91_mux_set_deglitch(pio, mask, is_on);  in at91_mux_pio3_set_deglitch()
175 static void at91_mux_pio3_set_debounce(struct at91_port *pio, u32 mask,  in at91_mux_pio3_set_debounce()  argument
179 		writel(mask, &pio->mux.pio3.ifscer);  in at91_mux_pio3_set_debounce()
181 		writel(mask, &pio->ifer);  in at91_mux_pio3_set_debounce()
183 		writel(mask, &pio->mux.pio3.ifscdr);  in at91_mux_pio3_set_debounce()
188 				       u32 mask, bool is_on)  in at91_mux_pio3_set_pulldown()  argument
191 		writel(mask, &pio->pudr);  in at91_mux_pio3_set_pulldown()
193 	writel(mask, (is_on ? &pio->mux.pio3.ppder : &pio->mux.pio3.ppddr));  in at91_mux_pio3_set_pulldown()
197 					       u32 mask)  in at91_mux_pio3_disable_schmitt_trig()  argument
199 	writel(readl(&pio->schmitt) | mask, &pio->schmitt);  in at91_mux_pio3_disable_schmitt_trig()
276 static void at91_mux_gpio_disable(struct at91_port *pio, u32 mask)  in at91_mux_gpio_disable()  argument
278 	writel(mask, &pio->pdr);  in at91_mux_gpio_disable()
281 static void at91_mux_gpio_enable(struct at91_port *pio, u32 mask, bool input)  in at91_mux_gpio_enable()  argument
283 	writel(mask, &pio->per);  in at91_mux_gpio_enable()
284 	writel(mask, (input ? &pio->odr : &pio->oer));  in at91_mux_gpio_enable()
288 			struct at91_port *pio, u32 mask, enum at91_mux mux)  in at91_pmx_set()  argument
290 	at91_mux_disable_interrupt(pio, mask);  in at91_pmx_set()
293 		at91_mux_gpio_enable(pio, mask, 1);  in at91_pmx_set()
296 		ops->mux_A_periph(pio, mask);  in at91_pmx_set()
299 		ops->mux_B_periph(pio, mask);  in at91_pmx_set()
304 		ops->mux_C_periph(pio, mask);  in at91_pmx_set()
309 		ops->mux_D_periph(pio, mask);  in at91_pmx_set()
313 		at91_mux_gpio_disable(pio, mask);  in at91_pmx_set()
321 	u32 mask = BIT(pin);  in at91_pinconf_set()  local
326 	at91_mux_set_output(pio, mask, config & OUTPUT,  in at91_pinconf_set()
328 	at91_mux_set_pullup(pio, mask, config & PULL_UP);  in at91_pinconf_set()
329 	at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);  in at91_pinconf_set()
331 		ops->set_deglitch(pio, mask, config & DEGLITCH);  in at91_pinconf_set()
333 		ops->set_debounce(pio, mask, config & DEBOUNCE,  in at91_pinconf_set()
336 		ops->set_pulldown(pio, mask, config & PULL_DOWN);  in at91_pinconf_set()
338 		ops->disable_schmitt_trig(pio, mask);  in at91_pinconf_set()
371 	u32 conf, mask, count, i;  in at91_pinctrl_set_state()  local
402 		mask = BIT(pin);  in at91_pinctrl_set_state()
404 		ret = at91_pmx_set(ops, pio, mask, mux);  in at91_pinctrl_set_state()