15  * struct xilinx_pcie - Xilinx PCIe controller state
27  * pcie_xilinx_link_up() - Check whether the PCIe link is up
28  * @pcie: Pointer to the PCI controller state
30  * Checks whether the PCIe link for the given device is up or down.
34 static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)  in pcie_xilinx_link_up()  argument
36 	uint32_t pscr = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_PSCR);  in pcie_xilinx_link_up()
44  * @bdf: Identifies the PCIe device to access
48  * Calculates the address that should be accessed to perform a PCIe
49  * configuration space access for a given device identified by the PCIe
50  * controller device @pcie and the bus, device & function numbers in @bdf. If
60 	struct xilinx_pcie *pcie = dev_get_priv(udev);  in pcie_xilinx_config_address()  local
66 	if ((bus > 0) && !pcie_xilinx_link_up(pcie))  in pcie_xilinx_config_address()
70 	 * Busses 0 (host-PCIe bridge) & 1 (its immediate child) are  in pcie_xilinx_config_address()
76 	addr = pcie->cfg_base;  in pcie_xilinx_config_address()
89  * @bdf: Identifies the PCIe device to access
111  * @bdf: Identifies the PCIe device to access
142 	struct xilinx_pcie *pcie = dev_get_priv(dev);  in pcie_xilinx_ofdata_to_platdata()  local
154 	pcie->cfg_base = map_physmem(reg_res.start,  in pcie_xilinx_ofdata_to_platdata()
167 	{ .compatible = "xlnx,axi-pcie-host-1.00.a" },