Lines Matching +full:rx +full:- +full:ping +full:- +full:pong

1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2009 Michal Simek
64 u32 tx_ping; /* 0x0 - TX Ping buffer */
66 u32 mdioaddr; /* 0x7e4 - MDIO Address Register */
67 u32 mdiowr; /* 0x7e8 - MDIO Write Data Register */
68 u32 mdiord;/* 0x7ec - MDIO Read Data Register */
69 u32 mdioctrl; /* 0x7f0 - MDIO Control Register */
70 u32 tx_ping_tplr; /* 0x7f4 - Tx packet length */
71 u32 global_interrupt; /* 0x7f8 - Global interrupt enable */
72 u32 tx_ping_tsr; /* 0x7fc - Tx status */
73 u32 tx_pong; /* 0x800 - TX Pong buffer */
75 u32 tx_pong_tplr; /* 0xff4 - Tx packet length */
77 u32 tx_pong_tsr; /* 0xffc - Tx status */
78 u32 rx_ping; /* 0x1000 - Receive Buffer */
80 u32 rx_ping_rsr; /* 0x17fc - Rx status */
81 u32 rx_pong; /* 0x1800 - Receive Buffer */
83 u32 rx_pong_rsr; /* 0x1ffc - Rx status */
87 bool use_rx_pong_buffer_next; /* Next RX buffer to read from */
88 u32 txpp; /* TX ping pong buffer */
89 u32 rxpp; /* RX ping pong buffer */
113 bytecount -= 4; in xemaclite_alignedread()
137 bytecount -= 4; in xemaclite_alignedwrite()
170 return -EINTR; in wait_for_bit()
179 return -ETIMEDOUT; in wait_for_bit()
184 return wait_for_bit(__func__, &regs->mdioctrl, in mdio_wait()
191 struct emaclite_regs *regs = emaclite->regs; in phyread()
196 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phyread()
199 | registernum), &regs->mdioaddr); in phyread()
200 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phyread()
206 *data = __raw_readl(&regs->mdiord); in phyread()
213 struct emaclite_regs *regs = emaclite->regs; in phywrite()
224 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phywrite()
227 | registernum), &regs->mdioaddr); in phywrite()
228 __raw_writel(data, &regs->mdiowr); in phywrite()
229 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phywrite()
249 * 0x0008: Auto-negotiation support
265 if (emaclite->phyaddr != -1) { in setup_phy()
266 phyread(emaclite, emaclite->phyaddr, PHY_DETECT_REG, &phyreg); in setup_phy()
271 emaclite->phyaddr); in setup_phy()
274 emaclite->phyaddr); in setup_phy()
275 emaclite->phyaddr = -1; in setup_phy()
279 if (emaclite->phyaddr == -1) { in setup_phy()
281 for (i = 31; i >= 0; i--) { in setup_phy()
286 emaclite->phyaddr = i; in setup_phy()
294 /* interface - look at tsec */ in setup_phy()
295 phydev = phy_connect(emaclite->bus, emaclite->phyaddr, dev, in setup_phy()
298 * Phy can support 1000baseT but device NOT that's why phydev->supported in setup_phy()
299 * must be setup for 1000baseT. phydev->advertising setups what speeds in setup_phy()
302 phydev->supported = supported | SUPPORTED_1000baseT_Half | in setup_phy()
304 phydev->advertising = supported; in setup_phy()
305 emaclite->phydev = phydev; in setup_phy()
311 if (!phydev->link) { in setup_phy()
312 printf("%s: No link.\n", phydev->dev->name); in setup_phy()
324 struct emaclite_regs *regs = emaclite->regs; in emaclite_start()
329 * TX - TX_PING & TX_PONG initialization in emaclite_start()
331 /* Restart PING TX */ in emaclite_start()
332 __raw_writel(0, &regs->tx_ping_tsr); in emaclite_start()
334 xemaclite_alignedwrite(pdata->enetaddr, &regs->tx_ping, in emaclite_start()
337 __raw_writel(ENET_ADDR_LENGTH, &regs->tx_ping_tplr); in emaclite_start()
339 __raw_writel(XEL_TSR_PROG_MAC_ADDR, &regs->tx_ping_tsr); in emaclite_start()
341 while ((__raw_readl(&regs->tx_ping_tsr) & in emaclite_start()
345 if (emaclite->txpp) { in emaclite_start()
346 /* The same operation with PONG TX */ in emaclite_start()
347 __raw_writel(0, &regs->tx_pong_tsr); in emaclite_start()
348 xemaclite_alignedwrite(pdata->enetaddr, &regs->tx_pong, in emaclite_start()
350 __raw_writel(ENET_ADDR_LENGTH, &regs->tx_pong_tplr); in emaclite_start()
351 __raw_writel(XEL_TSR_PROG_MAC_ADDR, &regs->tx_pong_tsr); in emaclite_start()
352 while ((__raw_readl(&regs->tx_pong_tsr) & in emaclite_start()
358 * RX - RX_PING & RX_PONG initialization in emaclite_start()
360 /* Write out the value to flush the RX buffer */ in emaclite_start()
361 __raw_writel(XEL_RSR_RECV_IE_MASK, &regs->rx_ping_rsr); in emaclite_start()
363 if (emaclite->rxpp) in emaclite_start()
364 __raw_writel(XEL_RSR_RECV_IE_MASK, &regs->rx_pong_rsr); in emaclite_start()
366 __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK, &regs->mdioctrl); in emaclite_start()
367 if (__raw_readl(&regs->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK) in emaclite_start()
369 return -1; in emaclite_start()
378 struct emaclite_regs *regs = emaclite->regs; in xemaclite_txbufferavailable()
384 tmp = ~__raw_readl(&regs->tx_ping_tsr); in xemaclite_txbufferavailable()
385 if (emaclite->txpp) in xemaclite_txbufferavailable()
386 tmp |= ~__raw_readl(&regs->tx_pong_tsr); in xemaclite_txbufferavailable()
395 struct emaclite_regs *regs = emaclite->regs; in emaclite_send()
404 maxtry--; in emaclite_send()
409 /* Restart PING TX */ in emaclite_send()
410 __raw_writel(0, &regs->tx_ping_tsr); in emaclite_send()
411 if (emaclite->txpp) { in emaclite_send()
412 __raw_writel(0, &regs->tx_pong_tsr); in emaclite_send()
414 return -1; in emaclite_send()
418 reg = __raw_readl(&regs->tx_ping_tsr); in emaclite_send()
422 xemaclite_alignedwrite(ptr, &regs->tx_ping, len); in emaclite_send()
425 &regs->tx_ping_tplr); in emaclite_send()
426 reg = __raw_readl(&regs->tx_ping_tsr); in emaclite_send()
428 __raw_writel(reg, &regs->tx_ping_tsr); in emaclite_send()
432 if (emaclite->txpp) { in emaclite_send()
434 reg = __raw_readl(&regs->tx_pong_tsr); in emaclite_send()
438 xemaclite_alignedwrite(ptr, &regs->tx_pong, len); in emaclite_send()
442 &regs->tx_pong_tplr); in emaclite_send()
443 reg = __raw_readl(&regs->tx_pong_tsr); in emaclite_send()
445 __raw_writel(reg, &regs->tx_pong_tsr); in emaclite_send()
451 return -1; in emaclite_send()
458 struct xemaclite *emaclite = dev->priv; in emaclite_recv()
459 struct emaclite_regs *regs = emaclite->regs; in emaclite_recv()
464 if (!emaclite->use_rx_pong_buffer_next) { in emaclite_recv()
465 reg = __raw_readl(&regs->rx_ping_rsr); in emaclite_recv()
469 addr = &regs->rx_ping; in emaclite_recv()
470 ack = &regs->rx_ping_rsr; in emaclite_recv()
473 /* Pong buffer is not available - return immediately */ in emaclite_recv()
474 if (!emaclite->rxpp) in emaclite_recv()
475 return -1; in emaclite_recv()
477 /* Try pong buffer if this is first attempt */ in emaclite_recv()
479 return -1; in emaclite_recv()
480 emaclite->use_rx_pong_buffer_next = in emaclite_recv()
481 !emaclite->use_rx_pong_buffer_next; in emaclite_recv()
485 reg = __raw_readl(&regs->rx_pong_rsr); in emaclite_recv()
489 addr = &regs->rx_pong; in emaclite_recv()
490 ack = &regs->rx_pong_rsr; in emaclite_recv()
493 /* Try ping buffer if this is first attempt */ in emaclite_recv()
495 return -1; in emaclite_recv()
496 emaclite->use_rx_pong_buffer_next = in emaclite_recv()
497 !emaclite->use_rx_pong_buffer_next; in emaclite_recv()
502 /* Read all bytes for ARP packet with 32bit alignment - 48bytes */ in emaclite_recv()
508 switch (ntohs(eth->et_protlen)) { in emaclite_recv()
515 length = ntohs(ip->ip_len); in emaclite_recv()
529 length - first_read); in emaclite_recv()
547 ret = phyread(bus->priv, addr, reg, &val); in emaclite_miiphy_read()
556 return phywrite(bus->priv, addr, reg, value); in emaclite_miiphy_write()
564 emaclite->bus = mdio_alloc(); in emaclite_probe()
565 emaclite->bus->read = emaclite_miiphy_read; in emaclite_probe()
566 emaclite->bus->write = emaclite_miiphy_write; in emaclite_probe()
567 emaclite->bus->priv = emaclite; in emaclite_probe()
569 ret = mdio_register_seq(emaclite->bus, dev->seq); in emaclite_probe()
580 free(emaclite->phydev); in emaclite_remove()
581 mdio_unregister(emaclite->bus); in emaclite_remove()
582 mdio_free(emaclite->bus); in emaclite_remove()
600 pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); in emaclite_ofdata_to_platdata()
601 emaclite->regs = (struct emaclite_regs *)ioremap_nocache(pdata->iobase, in emaclite_ofdata_to_platdata()
604 emaclite->phyaddr = -1; in emaclite_ofdata_to_platdata()
606 offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), in emaclite_ofdata_to_platdata()
607 "phy-handle"); in emaclite_ofdata_to_platdata()
609 emaclite->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, in emaclite_ofdata_to_platdata()
610 "reg", -1); in emaclite_ofdata_to_platdata()
612 emaclite->txpp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), in emaclite_ofdata_to_platdata()
613 "xlnx,tx-ping-pong", 0); in emaclite_ofdata_to_platdata()
614 emaclite->rxpp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), in emaclite_ofdata_to_platdata()
615 "xlnx,rx-ping-pong", 0); in emaclite_ofdata_to_platdata()
617 printf("EMACLITE: %lx, phyaddr %d, %d/%d\n", (ulong)emaclite->regs, in emaclite_ofdata_to_platdata()
618 emaclite->phyaddr, emaclite->txpp, emaclite->rxpp); in emaclite_ofdata_to_platdata()
624 { .compatible = "xlnx,xps-ethernetlite-1.00.a" },